From: Stephen Boyd <swboyd@chromium.org>
To: Kishon Vijay Abraham I <kishon@ti.com>, Vinod Koul <vkoul@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Jeykumar Sankaran <jsanka@codeaurora.org>,
Chandan Uddaraju <chandanu@codeaurora.org>,
Vara Reddy <varar@codeaurora.org>,
Tanmay Shah <tanmay@codeaurora.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Manu Gautam <mgautam@codeaurora.org>,
Sandeep Maheswaram <sanm@codeaurora.org>,
Douglas Anderson <dianders@chromium.org>,
Sean Paul <seanpaul@chromium.org>,
Jonathan Marek <jonathan@marek.ca>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Rob Clark <robdclark@chromium.org>
Subject: [PATCH v1 2/9] phy: qcom-qmp: Move phy mode into struct qmp_phy
Date: Tue, 25 Aug 2020 19:47:04 -0700 [thread overview]
Message-ID: <20200826024711.220080-3-swboyd@chromium.org> (raw)
In-Reply-To: <20200826024711.220080-1-swboyd@chromium.org>
The phy mode pertains to the phy itself, i.e. 'struct qmp_phy', not the
wrapper, i.e. 'struct qcom_qmp'. Move the phy mode into the phy
structure to more accurately reflect what is going on. This also cleans
up 'struct qcom_qmp' so that it can eventually be the place where qmp
wrapper wide data is located, paving the way for the USB3+DP combo phy.
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Chandan Uddaraju <chandanu@codeaurora.org>
Cc: Vara Reddy <varar@codeaurora.org>
Cc: Tanmay Shah <tanmay@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Manu Gautam <mgautam@codeaurora.org>
Cc: Sandeep Maheswaram <sanm@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Jonathan Marek <jonathan@marek.ca>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 562053ce9455..7ee9e966dc6d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1812,6 +1812,7 @@ struct qmp_phy_cfg {
* @index: lane index
* @qmp: QMP phy to which this lane belongs
* @lane_rst: lane's reset controller
+ * @mode: current PHY mode
*/
struct qmp_phy {
struct phy *phy;
@@ -1825,6 +1826,7 @@ struct qmp_phy {
unsigned int index;
struct qcom_qmp *qmp;
struct reset_control *lane_rst;
+ enum phy_mode mode;
};
/**
@@ -1843,7 +1845,6 @@ struct qmp_phy {
* @phy_mutex: mutex lock for PHY common block initialization
* @init_count: phy common block initialization count
* @phy_initialized: indicate if PHY has been initialized
- * @mode: current PHY mode
* @ufs_reset: optional UFS PHY reset handle
*/
struct qcom_qmp {
@@ -1861,7 +1862,6 @@ struct qcom_qmp {
struct mutex phy_mutex;
int init_count;
bool phy_initialized;
- enum phy_mode mode;
struct reset_control *ufs_reset;
};
@@ -2801,9 +2801,8 @@ static int qcom_qmp_phy_set_mode(struct phy *phy,
enum phy_mode mode, int submode)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
- struct qcom_qmp *qmp = qphy->qmp;
- qmp->mode = mode;
+ qphy->mode = mode;
return 0;
}
@@ -2816,8 +2815,8 @@ static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy)
void __iomem *pcs_misc = qphy->pcs_misc;
u32 intr_mask;
- if (qmp->mode == PHY_MODE_USB_HOST_SS ||
- qmp->mode == PHY_MODE_USB_DEVICE_SS)
+ if (qphy->mode == PHY_MODE_USB_HOST_SS ||
+ qphy->mode == PHY_MODE_USB_DEVICE_SS)
intr_mask = ARCVR_DTCT_EN | ALFPS_DTCT_EN;
else
intr_mask = ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL;
@@ -2863,7 +2862,7 @@ static int __maybe_unused qcom_qmp_phy_runtime_suspend(struct device *dev)
struct qmp_phy *qphy = qmp->phys[0];
const struct qmp_phy_cfg *cfg = qmp->cfg;
- dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode);
+ dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qphy->mode);
/* Supported only for USB3 PHY */
if (cfg->type != PHY_TYPE_USB3)
@@ -2889,7 +2888,7 @@ static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev)
const struct qmp_phy_cfg *cfg = qmp->cfg;
int ret = 0;
- dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode);
+ dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qphy->mode);
/* Supported only for USB3 PHY */
if (cfg->type != PHY_TYPE_USB3)
--
Sent by a computer, using git, on the internet
next prev parent reply other threads:[~2020-08-26 2:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-26 2:47 [PATCH v1 0/9] Support qcom USB3+DP combo phy (or type-c phy) Stephen Boyd
2020-08-26 2:47 ` [PATCH v1 1/9] dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy information Stephen Boyd
2020-08-26 2:47 ` Stephen Boyd [this message]
2020-08-26 3:37 ` [PATCH v1 2/9] phy: qcom-qmp: Move phy mode into struct qmp_phy Bjorn Andersson
2020-08-26 2:47 ` [PATCH v1 3/9] phy: qcom-qmp: Remove 'initialized' in favor of 'init_count' Stephen Boyd
2020-08-26 3:44 ` Bjorn Andersson
2020-08-26 2:47 ` [PATCH v1 4/9] phy: qcom-qmp: Move 'serdes' and 'cfg' into 'struct qcom_phy' Stephen Boyd
2020-08-26 2:47 ` [PATCH v1 5/9] phy: qcom-qmp: Get dp_com I/O resource by index Stephen Boyd
2020-08-26 4:36 ` Bjorn Andersson
2020-08-26 21:32 ` Stephen Boyd
2020-08-27 1:59 ` Bjorn Andersson
2020-08-26 2:47 ` [PATCH v1 6/9] phy: qcom-qmp: Add support for DP in USB3+DP combo phy Stephen Boyd
2020-09-01 13:36 ` Dmitry Baryshkov
2020-09-02 1:01 ` Stephen Boyd
2020-09-03 12:37 ` Dmitry Baryshkov
2020-09-03 12:41 ` Jonathan Marek
2020-09-03 21:35 ` Dmitry Baryshkov
2020-09-03 22:55 ` Stephen Boyd
2020-08-26 2:47 ` [PATCH v1 7/9] phy: qcom-qmp: Add support for sc7180 DP phy Stephen Boyd
2020-08-26 2:47 ` [PATCH v1 8/9] clk: qcom: dispcc: Update DP clk ops for phy design Stephen Boyd
2020-08-26 2:47 ` [PATCH v1 9/9] drm/msm/dp: Use qmp phy for DP PLL and PHY Stephen Boyd
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