[PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Andre Przywara]

This is an attempt to convert the SP805 watchdog DT binding to yaml.
This is done in the first patch, the remaining nine fix some DT users.

I couldn't test any of those DT files on actual machines, but tried
to make the changes in a way that would be transparent to at least the
Linux driver. The only other SP805 DT user I could find is U-Boot, which
seems to only use a very minimal subset of the binding (just the first
clock).
I only tried to fix those DTs that were easily and reliably fixable.
AFAICT, a missing primecell compatible string, for instance, would
prevent the Linux driver from probing the device at all, so I didn't
dare to touch those DTs at all. Missing clocks are equally fatal.

Cheers,
Andre

Andre Przywara (10):
  dt-bindings: watchdog: sp-805: Convert to Json-schema
  arm64: dts: arm: Fix SP805 clock-names
  arm64: dts: broadcom: Fix SP805 clock-names
  arm64: dts: freescale: Fix SP805 clock-names
  arm64: dts: hisilicon: Fix SP805 clocks
  arm64: dts: lg: Fix SP805 clocks
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: Cygnus: Fix SP805 clocks
  ARM: dts: NSP: Fix SP805 clock-names
  ARM: dts: hisilicon: Fix SP805 clocks

 .../bindings/watchdog/arm,sp805.txt           | 32 ---------
 .../bindings/watchdog/arm,sp805.yaml          | 72 +++++++++++++++++++
 arch/arm/boot/dts/arm-realview-eb.dtsi        |  2 +-
 arch/arm/boot/dts/arm-realview-pb11mp.dts     |  4 +-
 arch/arm/boot/dts/arm-realview-pbx.dtsi       |  4 +-
 arch/arm/boot/dts/bcm-cygnus.dtsi             |  4 +-
 arch/arm/boot/dts/bcm-nsp.dtsi                |  2 +-
 arch/arm/boot/dts/hisi-x5hd2.dtsi             |  5 +-
 arch/arm/boot/dts/mps2.dtsi                   |  4 +-
 arch/arm/boot/dts/vexpress-v2m-rs1.dtsi       |  2 +-
 arch/arm/boot/dts/vexpress-v2m.dtsi           |  2 +-
 arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts   |  4 +-
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts    |  2 +-
 arch/arm/boot/dts/vexpress-v2p-ca9.dts        |  2 +-
 arch/arm64/boot/dts/arm/juno-motherboard.dtsi |  2 +-
 .../boot/dts/arm/rtsm_ve-motherboard.dtsi     |  2 +-
 .../boot/dts/broadcom/northstar2/ns2.dtsi     |  2 +-
 .../boot/dts/broadcom/stingray/stingray.dtsi  |  2 +-
 .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi |  4 +-
 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++---
 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 16 ++---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi     | 10 +--
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi     |  5 +-
 arch/arm64/boot/dts/lg/lg1312.dtsi            |  4 +-
 arch/arm64/boot/dts/lg/lg1313.dtsi            |  4 +-
 25 files changed, 126 insertions(+), 82 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
 create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml

-- 
2.17.1

[PATCH 01/10] dt-bindings: watchdog: sp-805: Convert to Json-schema

[Andre Przywara]

Convert the ARM SP-805 watchdog IP DT binding over to Json-schema.

A straight-forward conversion, but the requirement for providing two
clocks got strengthened from "should" to "must".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../bindings/watchdog/arm,sp805.txt           | 32 --------
 .../bindings/watchdog/arm,sp805.yaml          | 75 +++++++++++++++++++
 2 files changed, 75 insertions(+), 32 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
 create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml

diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
deleted file mode 100644
index bee6f1f0e41b..000000000000
--- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-ARM AMBA Primecell SP805 Watchdog
-
-SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
-can be used to identify the peripheral type, vendor, and revision.
-This value can be used for driver matching.
-
-As SP805 WDT is a primecell IP, it follows the base bindings specified in
-'arm/primecell.txt'
-
-Required properties:
-- compatible:  Should be "arm,sp805" & "arm,primecell"
-- reg:         Should contain location and length for watchdog timer register
-- clocks:      Clocks driving the watchdog timer hardware. This list should be
-               2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
-               wdog_clk can be equal to or be a sub-multiple of the apb_pclk
-               frequency
-- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
-               second one
-
-Optional properties:
-- interrupts:  Should specify WDT interrupt number
-- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
-               default timeout is determined by the driver
-
-Example:
-	watchdog@66090000 {
-		compatible = "arm,sp805", "arm,primecell";
-		reg = <0x66090000 0x1000>;
-		interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&wdt_clk>, <&apb_pclk>;
-		clock-names = "wdog_clk", "apb_pclk";
-	};
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
new file mode 100644
index 000000000000..980e155d3387
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM AMBA Primecell SP805 Watchdog
+
+maintainers:
+  - Viresh Kumar <vireshk@kernel.org>
+
+description: |+
+  The Arm SP805 IP implements a watchdog device, which triggers an interrupt
+  after a configurable time period. If that interrupt has not been serviced
+  when the next interrupt would be triggered, the reset signal is asserted.
+
+allOf:
+  - $ref: /schemas/arm/primecell.yaml#
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+  properties:
+    compatible:
+      contains:
+        const: arm,sp805
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - const: arm,sp805
+      - const: arm,primecell
+
+  interrupts:
+    maxItems: 1
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description: |
+      Clocks driving the watchdog timer hardware. The first clock is used
+      for the actual watchdog counter. The second clock drives the register
+      interface.
+    minItems: 2
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: wdog_clk
+      - const: apb_pclk
+
+  timeout-sec:
+    description: |
+      Should specify default WDT timeout in seconds. If unset, the default
+      timeout is determined by the driver.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    watchdog@66090000 {
+        compatible = "arm,sp805", "arm,primecell";
+        reg = <0x66090000 0x1000>;
+        interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&wdt_clk>, <&apb_pclk>;
+        clock-names = "wdog_clk", "apb_pclk";
+    };
-- 
2.17.1

[PATCH 02/10] arm64: dts: arm: Fix SP805 clock-names

[Andre Przywara]

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/juno-motherboard.dtsi    | 2 +-
 arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index eeee51f1251b..40d95c58b55e 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -251,7 +251,7 @@
 					reg = <0x0f0000 0x10000>;
 					interrupts = <7>;
 					clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
-					clock-names = "wdogclk", "apb_pclk";
+					clock-names = "wdog_clk", "apb_pclk";
 				};
 
 				v2m_timer01: timer@110000 {
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index 001a0a3c7f66..4c4a381d2c75 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -195,7 +195,7 @@
 					reg = <0x0f0000 0x1000>;
 					interrupts = <0>;
 					clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
-					clock-names = "wdogclk", "apb_pclk";
+					clock-names = "wdog_clk", "apb_pclk";
 				};
 
 				v2m_timer01: timer@110000 {
-- 
2.17.1

[PATCH 03/10] arm64: dts: broadcom: Fix SP805 clock-names

[Andre Przywara]

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for Broadcom platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi    | 2 +-
 arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index 15f7b0ed3836..6a5fc55f0a4e 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -576,7 +576,7 @@
 			reg = <0x66090000 0x1000>;
 			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&iprocslow>, <&iprocslow>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		gpio_g: gpio@660a0000 {
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 0098dfdef96c..b425b12c3ed2 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -438,7 +438,7 @@
 			reg = <0x000c0000 0x1000>;
 			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 			timeout-sec = <60>;
 		};
 
-- 
2.17.1

[PATCH 04/10] arm64: dts: freescale: Fix SP805 clock-names

[Andre Przywara]

The SP805 binding sets the order of the clock-names to be: "wdog_clk",
"apb_pclk" (in exactly that order).

Change the order in the DTs for Freescale platforms to match that. The
two clocks given in all nodes are actually the same, so that does not
change any behaviour.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |  4 ++--
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++++++++--------
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 16 ++++++++--------
 3 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 0efeb8fa773e..13c0163939ad 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -722,14 +722,14 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x0 0xc000000 0x0 0x1000>;
 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster1_core1_watchdog: watchdog@c010000 {
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x0 0xc010000 0x0 0x1000>;
 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		sai1: audio-controller@f100000 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 169f4742ae3b..762d571e929c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -658,56 +658,56 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc000000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster1_core1_watchdog: wdt@c010000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc010000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster1_core2_watchdog: wdt@c020000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc020000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster1_core3_watchdog: wdt@c030000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc030000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core0_watchdog: wdt@c100000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc100000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core1_watchdog: wdt@c110000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc110000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core2_watchdog: wdt@c120000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc120000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core3_watchdog: wdt@c130000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc130000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		fsl_mc: fsl-mc@80c000000 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 41102dacc2e1..d3d87c56616c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -231,56 +231,56 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc000000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster1_core1_watchdog: wdt@c010000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc010000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core0_watchdog: wdt@c100000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc100000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster2_core1_watchdog: wdt@c110000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc110000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster3_core0_watchdog: wdt@c200000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc200000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster3_core1_watchdog: wdt@c210000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc210000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster4_core0_watchdog: wdt@c300000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc300000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		cluster4_core1_watchdog: wdt@c310000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xc310000 0x0 0x1000>;
 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-			clock-names = "apb_pclk", "wdog_clk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		crypto: crypto@8000000 {
-- 
2.17.1

[PATCH 05/10] arm64: dts: hisilicon: Fix SP805 clocks

[Andre Przywara]

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++----
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi |  5 +++--
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index d25aac5e0bf8..994140fbc916 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1089,16 +1089,18 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a06000 0x0 0x1000>;
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		watchdog1: watchdog@e8a07000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a07000 0x0 0x1000>;
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@fff30000 {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3d189d9f0d24..6578f8191d71 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -843,8 +843,9 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xf8005000 0x0 0x1000>;
 			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
-			clock-names = "apb_pclk";
+			clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
+				 <&ao_ctrl HI6220_WDT0_PCLK>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@0,f7030700 {
-- 
2.17.1

[PATCH 06/10] arm64: dts: lg: Fix SP805 clocks

[Andre Przywara]

The SP805 DT binding requires two clocks to be specified, but the two
LG platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux (and U-Boot) SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/lg/lg1312.dtsi | 4 ++--
 arch/arm64/boot/dts/lg/lg1313.dtsi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index e2a1564597c8..081fe7a9f605 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -141,8 +141,8 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x0 0xfd200000 0x1000>;
 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk_bus>;
-			clock-names = "apb_pclk";
+			clocks = <&clk_bus>, <&clk_bus>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 		uart0: serial@fe000000 {
 			compatible = "arm,pl011", "arm,primecell";
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index a54d14d7ae6f..604bb6975337 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -141,8 +141,8 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x0 0xfd200000 0x1000>;
 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk_bus>;
-			clock-names = "apb_pclk";
+			clocks = <&clk_bus>, <&clk_bus>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 		uart0: serial@fe000000 {
 			compatible = "arm,pl011", "arm,primecell";
-- 
2.17.1

[PATCH 07/10] ARM: dts: arm: Fix SP805 clocks

[Andre Przywara]

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/arm-realview-eb.dtsi      | 2 +-
 arch/arm/boot/dts/arm-realview-pb11mp.dts   | 4 ++--
 arch/arm/boot/dts/arm-realview-pbx.dtsi     | 4 ++--
 arch/arm/boot/dts/mps2.dtsi                 | 4 ++--
 arch/arm/boot/dts/vexpress-v2m-rs1.dtsi     | 2 +-
 arch/arm/boot/dts/vexpress-v2m.dtsi         | 2 +-
 arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 4 ++--
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts  | 2 +-
 arch/arm/boot/dts/vexpress-v2p-ca9.dts      | 2 +-
 9 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/arm-realview-eb.dtsi b/arch/arm/boot/dts/arm-realview-eb.dtsi
index fe0207b88053..a534a8e444d9 100644
--- a/arch/arm/boot/dts/arm-realview-eb.dtsi
+++ b/arch/arm/boot/dts/arm-realview-eb.dtsi
@@ -390,7 +390,7 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x10010000 0x1000>;
 			clocks = <&wdogclk>, <&pclk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm-realview-pb11mp.dts
index 564e2eee2c24..0c7dabef4a5f 100644
--- a/arch/arm/boot/dts/arm-realview-pb11mp.dts
+++ b/arch/arm/boot/dts/arm-realview-pb11mp.dts
@@ -546,7 +546,7 @@
 			interrupt-parent = <&intc_pb11mp>;
 			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&wdogclk>, <&pclk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -556,7 +556,7 @@
 			interrupt-parent = <&intc_pb11mp>;
 			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&wdogclk>, <&pclk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		timer01: timer@10011000 {
diff --git a/arch/arm/boot/dts/arm-realview-pbx.dtsi b/arch/arm/boot/dts/arm-realview-pbx.dtsi
index f61bd59ae5ba..ac95667ed781 100644
--- a/arch/arm/boot/dts/arm-realview-pbx.dtsi
+++ b/arch/arm/boot/dts/arm-realview-pbx.dtsi
@@ -381,7 +381,7 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x1000f000 0x1000>;
 			clocks = <&wdogclk>, <&pclk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -389,7 +389,7 @@
 			compatible = "arm,sp805", "arm,primecell";
 			reg = <0x10010000 0x1000>;
 			clocks = <&wdogclk>, <&pclk>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 			status = "disabled";
 		};
 
diff --git a/arch/arm/boot/dts/mps2.dtsi b/arch/arm/boot/dts/mps2.dtsi
index 48c34fa282af..37f5023f529c 100644
--- a/arch/arm/boot/dts/mps2.dtsi
+++ b/arch/arm/boot/dts/mps2.dtsi
@@ -199,8 +199,8 @@
 				arm,primecell-periphid = <0x00141805>;
 				reg = <0x8000 0x1000>;
 				interrupts = <0>;
-				clocks = <&sysclk>;
-				clock-names = "apb_pclk";
+				clocks = <&sysclk>, <&sysclk>;
+				clock-names = "wdog_clk", "apb_pclk";
 				status = "disabled";
 			};
 		};
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index a88ee5294d35..4f7220b11f2d 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -280,7 +280,7 @@
 					reg = <0x0f0000 0x1000>;
 					interrupts = <0>;
 					clocks = <&v2m_refclk32khz>, <&smbclk>;
-					clock-names = "wdogclk", "apb_pclk";
+					clock-names = "wdog_clk", "apb_pclk";
 				};
 
 				v2m_timer01: timer@110000 {
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index 5e48b641068a..2ac41ed3a57c 100644
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -198,7 +198,7 @@
 					reg = <0x0f000 0x1000>;
 					interrupts = <0>;
 					clocks = <&v2m_refclk32khz>, <&smbclk>;
-					clock-names = "wdogclk", "apb_pclk";
+					clock-names = "wdog_clk", "apb_pclk";
 				};
 
 				v2m_timer01: timer@11000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index f82fa34c90be..e63c5c0bfb43 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -87,8 +87,8 @@
 		status = "disabled";
 		reg = <0 0x2b060000 0 0x1000>;
 		interrupts = <0 98 4>;
-		clocks = <&sys_pll>;
-		clock-names = "apb_pclk";
+		clocks = <&sys_pll>, <&sys_pll>;
+		clock-names = "wdog_clk", "apb_pclk";
 	};
 
 	gic: interrupt-controller@2c001000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 3ac95a179452..012d40a7228c 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -128,7 +128,7 @@
 		reg = <0 0x2a490000 0 0x1000>;
 		interrupts = <0 98 4>;
 		clocks = <&oscclk6a>, <&oscclk6a>;
-		clock-names = "wdogclk", "apb_pclk";
+		clock-names = "wdog_clk", "apb_pclk";
 	};
 
 	hdlcd@2b000000 {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 6cddea25a292..4c5847955856 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -132,7 +132,7 @@
 		reg = <0x100e5000 0x1000>;
 		interrupts = <0 51 4>;
 		clocks = <&oscclk2>, <&oscclk2>;
-		clock-names = "wdogclk", "apb_pclk";
+		clock-names = "wdog_clk", "apb_pclk";
 	};
 
 	scu@1e000000 {
-- 
2.17.1

[PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks

[Andre Przywara]

The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 35bdd0969f0a..dacaef2c14ca 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -234,8 +234,8 @@
 			compatible = "arm,sp805" , "arm,primecell";
 			reg = <0x18009000 0x1000>;
 			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		gpio_ccm: gpio@1800a000 {
-- 
2.17.1

[PATCH 09/10] ARM: dts: NSP: Fix SP805 clock-names

[Andre Przywara]

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 1333ef8be0a2..351908b4a39c 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -438,7 +438,7 @@
 			reg = <0x39000 0x1000>;
 			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&iprocslow>, <&iprocslow>;
-			clock-names = "wdogclk", "apb_pclk";
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		lcpll0: lcpll0@3f100 {
-- 
2.17.1

[PATCH 10/10] ARM: dts: hisilicon: Fix SP805 clocks

[Andre Przywara]

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/hisi-x5hd2.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 3ee7967c202d..e2dbf1d8a67b 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -370,8 +370,9 @@
 				arm,primecell-periphid = <0x00141805>;
 				reg = <0xa2c000 0x1000>;
 				interrupts = <0 29 4>;
-				clocks = <&clock HIX5HD2_WDG0_RST>;
-				clock-names = "apb_pclk";
+				clocks = <&clock HIX5HD2_WDG0_RST>,
+					 <&clock HIX5HD2_WDG0_RST>;
+				clock-names = "wdog_clk", "apb_pclk";
 			};
 		};
 
-- 
2.17.1

Re: [PATCH 07/10] ARM: dts: arm: Fix SP805 clocks

[Linus Walleij]

On Fri, Aug 28, 2020 at 3:06 PM Andre Przywara <andre.przywara@arm.com> wrote:

> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
>
> Change the name in the DTs for ARM Ltd. platforms to match that. The
> Linux and U-Boot driver use the *first* clock for this purpose anyway,
> so it does not break anything.
>
> For MPS2 we only specify one clock so far, but the binding requires
> two clocks to be named.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency. So since currently both
> are the very same clock, we can just double the clock reference, and add
> the correct clock-names, to match the binding.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

Re: [PATCH 03/10] arm64: dts: broadcom: Fix SP805 clock-names

[Ray Jui]

On 8/28/2020 6:05 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for Broadcom platforms to match that. The
> Linux and U-Boot driver use the *first* clock for this purpose anyway,
> so it does not break anything.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi    | 2 +-
>  arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
> index 15f7b0ed3836..6a5fc55f0a4e 100644
> --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
> @@ -576,7 +576,7 @@
>  			reg = <0x66090000 0x1000>;
>  			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&iprocslow>, <&iprocslow>;
> -			clock-names = "wdogclk", "apb_pclk";
> +			clock-names = "wdog_clk", "apb_pclk";
>  		};
>  
>  		gpio_g: gpio@660a0000 {
> diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
> index 0098dfdef96c..b425b12c3ed2 100644
> --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
> @@ -438,7 +438,7 @@
>  			reg = <0x000c0000 0x1000>;
>  			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
> -			clock-names = "wdogclk", "apb_pclk";
> +			clock-names = "wdog_clk", "apb_pclk";
>  			timeout-sec = <60>;
>  		};
>  
> 

Although not currently used in the driver, this indeed should be fixed
to match DT documentation and be ready for future clock support in the
driver (i.e., getting clock by name).

Reviewed-by: Ray Jui <ray.jui@broadcom.com>

Re: [PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks

[Ray Jui]

On 8/28/2020 6:06 AM, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but the
> Broadcom Cygnus DT currently only specifies one clock.
> 
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency.
> 
> Since currently both are the very same clock, we can just double the
> clock reference, and add the correct clock-names, to match the binding.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 35bdd0969f0a..dacaef2c14ca 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -234,8 +234,8 @@
>  			compatible = "arm,sp805" , "arm,primecell";
>  			reg = <0x18009000 0x1000>;
>  			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&axi81_clk>;
> -			clock-names = "apb_pclk";
> +			clocks = <&axi81_clk>, <&axi81_clk>;
> +			clock-names = "wdog_clk", "apb_pclk";
>  		};
>  
>  		gpio_ccm: gpio@1800a000 {
> 

Reviewed-by: Ray Jui <ray.jui@broadcom.com>

Re: [PATCH 09/10] ARM: dts: NSP: Fix SP805 clock-names

[Ray Jui]

On 8/28/2020 6:06 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
> index 1333ef8be0a2..351908b4a39c 100644
> --- a/arch/arm/boot/dts/bcm-nsp.dtsi
> +++ b/arch/arm/boot/dts/bcm-nsp.dtsi
> @@ -438,7 +438,7 @@
>  			reg = <0x39000 0x1000>;
>  			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&iprocslow>, <&iprocslow>;
> -			clock-names = "wdogclk", "apb_pclk";
> +			clock-names = "wdog_clk", "apb_pclk";
>  		};
>  
>  		lcpll0: lcpll0@3f100 {
> 

Reviewed-by: Ray Jui <ray.jui@broadcom.com>

Re: [PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks

[Florian Fainelli]

On 8/28/20 6:06 AM, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but the
> Broadcom Cygnus DT currently only specifies one clock.
> 
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency.
> 
> Since currently both are the very same clock, we can just double the
> clock reference, and add the correct clock-names, to match the binding.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH 09/10] ARM: dts: NSP: Fix SP805 clock-names

[Florian Fainelli]

On 8/28/20 6:06 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH 03/10] arm64: dts: broadcom: Fix SP805 clock-names

[Florian Fainelli]

On 8/28/20 6:05 AM, Andre Przywara wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for Broadcom platforms to match that. The
> Linux and U-Boot driver use the *first* clock for this purpose anyway,
> so it does not break anything.

Not that it really matters because the driver does a
devm_clk_get(&adev->dev, NULL), but yes, this should be fixed to conform
to the binding.

> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Florian Fainelli]

On 8/28/20 6:05 AM, Andre Przywara wrote:
> This is an attempt to convert the SP805 watchdog DT binding to yaml.
> This is done in the first patch, the remaining nine fix some DT users.
> 
> I couldn't test any of those DT files on actual machines, but tried
> to make the changes in a way that would be transparent to at least the
> Linux driver. The only other SP805 DT user I could find is U-Boot, which
> seems to only use a very minimal subset of the binding (just the first
> clock).
> I only tried to fix those DTs that were easily and reliably fixable.
> AFAICT, a missing primecell compatible string, for instance, would
> prevent the Linux driver from probing the device at all, so I didn't
> dare to touch those DTs at all. Missing clocks are equally fatal.

What is the plan for merging this series? Should Rob pick up all changes
or since those are non critical changes, should we just leave it to the
SoC maintainers to pick up the changes in their tree?

Likewise for the SP804 timer series, what's the plan?
-- 
Florian

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Rob Herring]

On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> On 8/28/20 6:05 AM, Andre Przywara wrote:
> > This is an attempt to convert the SP805 watchdog DT binding to yaml.
> > This is done in the first patch, the remaining nine fix some DT users.
> >
> > I couldn't test any of those DT files on actual machines, but tried
> > to make the changes in a way that would be transparent to at least the
> > Linux driver. The only other SP805 DT user I could find is U-Boot, which
> > seems to only use a very minimal subset of the binding (just the first
> > clock).
> > I only tried to fix those DTs that were easily and reliably fixable.
> > AFAICT, a missing primecell compatible string, for instance, would
> > prevent the Linux driver from probing the device at all, so I didn't
> > dare to touch those DTs at all. Missing clocks are equally fatal.
>
> What is the plan for merging this series? Should Rob pick up all changes
> or since those are non critical changes, should we just leave it to the
> SoC maintainers to pick up the changes in their tree?

I don't take .dts files. Either subarch maintainers can pick up
individual patches or send a PR to SoC maintainers.

Rob

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Florian Fainelli]

On 8/28/20 2:28 PM, Rob Herring wrote:
> On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>>
>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>> This is an attempt to convert the SP805 watchdog DT binding to yaml.
>>> This is done in the first patch, the remaining nine fix some DT users.
>>>
>>> I couldn't test any of those DT files on actual machines, but tried
>>> to make the changes in a way that would be transparent to at least the
>>> Linux driver. The only other SP805 DT user I could find is U-Boot, which
>>> seems to only use a very minimal subset of the binding (just the first
>>> clock).
>>> I only tried to fix those DTs that were easily and reliably fixable.
>>> AFAICT, a missing primecell compatible string, for instance, would
>>> prevent the Linux driver from probing the device at all, so I didn't
>>> dare to touch those DTs at all. Missing clocks are equally fatal.
>>
>> What is the plan for merging this series? Should Rob pick up all changes
>> or since those are non critical changes, should we just leave it to the
>> SoC maintainers to pick up the changes in their tree?
> 
> I don't take .dts files. Either subarch maintainers can pick up
> individual patches or send a PR to SoC maintainers.

OK, so we are fine, to say make sure this all lands in v5.10-rc1 at some
point and the warnings should no longer exist by then?
-- 
Florian

Re: [PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks

[Florian Fainelli]

On Fri, 28 Aug 2020 14:06:00 +0100, Andre Przywara <andre.przywara@arm.com> wrote:
> The SP805 DT binding requires two clocks to be specified, but the
> Broadcom Cygnus DT currently only specifies one clock.
> 
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency.
> 
> Since currently both are the very same clock, we can just double the
> clock reference, and add the correct clock-names, to match the binding.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---

Applied to qspi-fixes, thanks!
--
Florian

Re: [PATCH 09/10] ARM: dts: NSP: Fix SP805 clock-names

[Florian Fainelli]

On Fri, 28 Aug 2020 14:06:01 +0100, Andre Przywara <andre.przywara@arm.com> wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for the Broadcom NSP platform to match that.
> The Linux and U-Boot driver use the *first* clock for this purpose
> anyway, so it does not break anything.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---

Applied to qspi-fixes, thanks!
--
Florian

Re: [PATCH 03/10] arm64: dts: broadcom: Fix SP805 clock-names

[Florian Fainelli]

On Fri, 28 Aug 2020 14:05:55 +0100, Andre Przywara <andre.przywara@arm.com> wrote:
> The SP805 binding sets the name for the actual watchdog clock to
> "wdog_clk" (with an underscore).
> 
> Change the name in the DTs for Broadcom platforms to match that. The
> Linux and U-Boot driver use the *first* clock for this purpose anyway,
> so it does not break anything.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---

Applied to devicetree-arm64/next, thanks!
--
Florian

Re: [PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks

[Florian Fainelli]

On 8/30/2020 8:55 PM, Florian Fainelli wrote:
> On Fri, 28 Aug 2020 14:06:00 +0100, Andre Przywara <andre.przywara@arm.com> wrote:
>> The SP805 DT binding requires two clocks to be specified, but the
>> Broadcom Cygnus DT currently only specifies one clock.
>>
>> In practice, Linux would pick a clock named "apb_pclk" for the bus
>> clock, and the Linux and U-Boot SP805 driver would use the first clock
>> to derive the actual watchdog counter frequency.
>>
>> Since currently both are the very same clock, we can just double the
>> clock reference, and add the correct clock-names, to match the binding.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
> 
> Applied to qspi-fixes, thanks!

Applied to devicetree/next actually, likewise for the next patch.
-- 
Florian

Re: [PATCH 01/10] dt-bindings: watchdog: sp-805: Convert to Json-schema

[Viresh Kumar]

On 28-08-20, 14:05, Andre Przywara wrote:
> Convert the ARM SP-805 watchdog IP DT binding over to Json-schema.
> 
> A straight-forward conversion, but the requirement for providing two
> clocks got strengthened from "should" to "must".
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/watchdog/arm,sp805.txt           | 32 --------
>  .../bindings/watchdog/arm,sp805.yaml          | 75 +++++++++++++++++++
>  2 files changed, 75 insertions(+), 32 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
>  create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

Re: [PATCH 04/10] arm64: dts: freescale: Fix SP805 clock-names

[Shawn Guo]

On Fri, Aug 28, 2020 at 02:05:56PM +0100, Andre Przywara wrote:
> The SP805 binding sets the order of the clock-names to be: "wdog_clk",
> "apb_pclk" (in exactly that order).
> 
> Change the order in the DTs for Freescale platforms to match that. The
> two clocks given in all nodes are actually the same, so that does not
> change any behaviour.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Applied, thanks.

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[André Przywara]

On 28/08/2020 22:32, Florian Fainelli wrote:

Hi,

Florian, thanks for queueing the Broadcom specific patches!

> On 8/28/20 2:28 PM, Rob Herring wrote:
>> On Fri, Aug 28, 2020 at 1:34 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>>>
>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>>> This is an attempt to convert the SP805 watchdog DT binding to yaml.
>>>> This is done in the first patch, the remaining nine fix some DT users.
>>>>
>>>> I couldn't test any of those DT files on actual machines, but tried
>>>> to make the changes in a way that would be transparent to at least the
>>>> Linux driver. The only other SP805 DT user I could find is U-Boot, which
>>>> seems to only use a very minimal subset of the binding (just the first
>>>> clock).
>>>> I only tried to fix those DTs that were easily and reliably fixable.
>>>> AFAICT, a missing primecell compatible string, for instance, would
>>>> prevent the Linux driver from probing the device at all, so I didn't
>>>> dare to touch those DTs at all. Missing clocks are equally fatal.
>>>
>>> What is the plan for merging this series? Should Rob pick up all changes
>>> or since those are non critical changes, should we just leave it to the
>>> SoC maintainers to pick up the changes in their tree?
>>
>> I don't take .dts files. Either subarch maintainers can pick up
>> individual patches or send a PR to SoC maintainers.
> 
> OK, so we are fine, to say make sure this all lands in v5.10-rc1 at some
> point and the warnings should no longer exist by then?

So yes, I would be very grateful if subsystem maintainers take this at
their discretion.
For once, I didn't actually change anything in the binding, so most
things were already slightly wrong according to the .txt binding, just
nobody realised or cared. So those .dts files changes are actually
independent and justified even without patch 01/10.

Secondly, there are already so many warnings in many .dts files at the
moment, that (in the worst case) a few more - for a brief period of time
- do not really matter. But at the end it will improve the situation.

Rob, if you are fine with the actual binding, I would try to pursue the
remaining subsystem maintainers to get the .dts changes merged.

Thanks,
Andre.

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Linus Walleij]

On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
> On 8/28/20 6:05 AM, Andre Przywara wrote:

> What is the plan for merging this series? Should Rob pick up all changes
> or since those are non critical changes, should we just leave it to the
> SoC maintainers to pick up the changes in their tree?

What about André just send a pull request to the ARM SoC maintainers
for the whole thing?

Yours,
Linus Walleij

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Florian Fainelli]

On 9/4/2020 1:58 AM, Linus Walleij wrote:
> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>> On 8/28/20 6:05 AM, Andre Przywara wrote:
> 
>> What is the plan for merging this series? Should Rob pick up all changes
>> or since those are non critical changes, should we just leave it to the
>> SoC maintainers to pick up the changes in their tree?
> 
> What about André just send a pull request to the ARM SoC maintainers
> for the whole thing?

I already applied some of the patches, if we got that route please CC me 
so I can drop them from my local queue. Thanks
-- 
Florian

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[André Przywara]

On 04/09/2020 16:29, Florian Fainelli wrote:

Hi,

> On 9/4/2020 1:58 AM, Linus Walleij wrote:>> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli
>> <f.fainelli@gmail.com> wrote:
>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>
>>> What is the plan for merging this series? Should Rob pick up all changes
>>> or since those are non critical changes, should we just leave it to the
>>> SoC maintainers to pick up the changes in their tree?
>>
>> What about André just send a pull request to the ARM SoC maintainers
>> for the whole thing?
> 
> I already applied some of the patches, if we got that route please CC me
> so I can drop them from my local queue. Thanks

I would for sure drop these from any PR.

Rob, are you happy with the actual binding conversion? If you are
willing to take it as it is (Viresh has already acked), I could then
split off the DT fixes and either chase the maintainers or send ARM SoC
a PR. But this really depends on the binding being good.

Cheers,
Andre.

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Florian Fainelli]

On 9/4/2020 8:35 AM, André Przywara wrote:
> On 04/09/2020 16:29, Florian Fainelli wrote:
> 
> Hi,
> 
>> On 9/4/2020 1:58 AM, Linus Walleij wrote:>> On Fri, Aug 28, 2020 at 9:34 PM Florian Fainelli
>>> <f.fainelli@gmail.com> wrote:
>>>> On 8/28/20 6:05 AM, Andre Przywara wrote:
>>>
>>>> What is the plan for merging this series? Should Rob pick up all changes
>>>> or since those are non critical changes, should we just leave it to the
>>>> SoC maintainers to pick up the changes in their tree?
>>>
>>> What about André just send a pull request to the ARM SoC maintainers
>>> for the whole thing?
>>
>> I already applied some of the patches, if we got that route please CC me
>> so I can drop them from my local queue. Thanks
> 
> I would for sure drop these from any PR.
> 
> Rob, are you happy with the actual binding conversion? If you are
> willing to take it as it is (Viresh has already acked), I could then
> split off the DT fixes and either chase the maintainers or send ARM SoC
> a PR. But this really depends on the binding being good.

We had discussed this in an another leg of this thread that starts here:

https://lore.kernel.org/linux-devicetree/CAL_JsqKvcGAotS6xL7pu+wM8X33PLCQCuoaXYmWrA3j3OdoR5A@mail.gmail.com/
--
Florian

Re: [PATCH 00/10] dt-bindings: Convert SP805 to Json-schema (and fix users)

[Sudeep Holla]

On Fri, 28 Aug 2020 14:05:52 +0100, Andre Przywara wrote:
> This is an attempt to convert the SP805 watchdog DT binding to yaml.
> This is done in the first patch, the remaining nine fix some DT users.
> 
> I couldn't test any of those DT files on actual machines, but tried
> to make the changes in a way that would be transparent to at least the
> Linux driver. The only other SP805 DT user I could find is U-Boot, which
> seems to only use a very minimal subset of the binding (just the first
> clock).
> I only tried to fix those DTs that were easily and reliably fixable.
> AFAICT, a missing primecell compatible string, for instance, would
> prevent the Linux driver from probing the device at all, so I didn't
> dare to touch those DTs at all. Missing clocks are equally fatal.
> 
> [...]

I have picked 2 patches for Arm Ltd boards/models.

Applied to sudeep.holla/linux (for-next/juno), thanks!

[1/2] (korg_sudeep/for-next/juno, for-next/juno) arm64: dts: arm: Fix SP805 clock-names
      https://git.kernel.org/sudeep.holla/c/b83ded8a31
[2/2] ARM: dts: arm: Fix SP805 clocks
      https://git.kernel.org/sudeep.holla/c/a894c6dd56

--

Regards,
Sudeep

Re: [PATCH 01/10] dt-bindings: watchdog: sp-805: Convert to Json-schema

[Rob Herring]

On Fri, Aug 28, 2020 at 7:06 AM Andre Przywara <andre.przywara@arm.com> wrote:
>
> Convert the ARM SP-805 watchdog IP DT binding over to Json-schema.
>
> A straight-forward conversion, but the requirement for providing two
> clocks got strengthened from "should" to "must".
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/watchdog/arm,sp805.txt           | 32 --------
>  .../bindings/watchdog/arm,sp805.yaml          | 75 +++++++++++++++++++
>  2 files changed, 75 insertions(+), 32 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
>  create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
>
> diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> deleted file mode 100644
> index bee6f1f0e41b..000000000000
> --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -ARM AMBA Primecell SP805 Watchdog
> -
> -SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
> -can be used to identify the peripheral type, vendor, and revision.
> -This value can be used for driver matching.
> -
> -As SP805 WDT is a primecell IP, it follows the base bindings specified in
> -'arm/primecell.txt'
> -
> -Required properties:
> -- compatible:  Should be "arm,sp805" & "arm,primecell"
> -- reg:         Should contain location and length for watchdog timer register
> -- clocks:      Clocks driving the watchdog timer hardware. This list should be
> -               2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
> -               wdog_clk can be equal to or be a sub-multiple of the apb_pclk
> -               frequency
> -- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
> -               second one
> -
> -Optional properties:
> -- interrupts:  Should specify WDT interrupt number
> -- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
> -               default timeout is determined by the driver
> -
> -Example:
> -       watchdog@66090000 {
> -               compatible = "arm,sp805", "arm,primecell";
> -               reg = <0x66090000 0x1000>;
> -               interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
> -               clocks = <&wdt_clk>, <&apb_pclk>;
> -               clock-names = "wdog_clk", "apb_pclk";
> -       };
> diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> new file mode 100644
> index 000000000000..980e155d3387
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM AMBA Primecell SP805 Watchdog
> +
> +maintainers:
> +  - Viresh Kumar <vireshk@kernel.org>
> +
> +description: |+
> +  The Arm SP805 IP implements a watchdog device, which triggers an interrupt
> +  after a configurable time period. If that interrupt has not been serviced
> +  when the next interrupt would be triggered, the reset signal is asserted.
> +
> +allOf:
> +  - $ref: /schemas/arm/primecell.yaml#

Should also ref watchdog.yaml here.

> +
> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
> +select:
> +  properties:
> +    compatible:
> +      contains:
> +        const: arm,sp805
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: arm,sp805
> +      - const: arm,primecell
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    description: |
> +      Clocks driving the watchdog timer hardware. The first clock is used
> +      for the actual watchdog counter. The second clock drives the register
> +      interface.
> +    minItems: 2
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: wdog_clk
> +      - const: apb_pclk
> +
> +  timeout-sec:
> +    description: |
> +      Should specify default WDT timeout in seconds. If unset, the default
> +      timeout is determined by the driver.
> +    $ref: /schemas/types.yaml#/definitions/uint32

You can drop this as it is part of watchdog.yaml.

> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names

Add:

unevaluatedProperties: false


> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    watchdog@66090000 {
> +        compatible = "arm,sp805", "arm,primecell";
> +        reg = <0x66090000 0x1000>;
> +        interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&wdt_clk>, <&apb_pclk>;
> +        clock-names = "wdog_clk", "apb_pclk";
> +    };
> --
> 2.17.1
>

Re: [PATCH 01/10] dt-bindings: watchdog: sp-805: Convert to Json-schema

[Rob Herring]

On Tue, Sep 8, 2020 at 11:20 AM Rob Herring <robh+dt@kernel.org> wrote:
>
> On Fri, Aug 28, 2020 at 7:06 AM Andre Przywara <andre.przywara@arm.com> wrote:
> >
> > Convert the ARM SP-805 watchdog IP DT binding over to Json-schema.
> >
> > A straight-forward conversion, but the requirement for providing two
> > clocks got strengthened from "should" to "must".
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  .../bindings/watchdog/arm,sp805.txt           | 32 --------
> >  .../bindings/watchdog/arm,sp805.yaml          | 75 +++++++++++++++++++
> >  2 files changed, 75 insertions(+), 32 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> >  create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> > deleted file mode 100644
> > index bee6f1f0e41b..000000000000
> > --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt
> > +++ /dev/null
> > @@ -1,32 +0,0 @@
> > -ARM AMBA Primecell SP805 Watchdog
> > -
> > -SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
> > -can be used to identify the peripheral type, vendor, and revision.
> > -This value can be used for driver matching.
> > -
> > -As SP805 WDT is a primecell IP, it follows the base bindings specified in
> > -'arm/primecell.txt'
> > -
> > -Required properties:
> > -- compatible:  Should be "arm,sp805" & "arm,primecell"
> > -- reg:         Should contain location and length for watchdog timer register
> > -- clocks:      Clocks driving the watchdog timer hardware. This list should be
> > -               2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
> > -               wdog_clk can be equal to or be a sub-multiple of the apb_pclk
> > -               frequency
> > -- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
> > -               second one
> > -
> > -Optional properties:
> > -- interrupts:  Should specify WDT interrupt number
> > -- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
> > -               default timeout is determined by the driver
> > -
> > -Example:
> > -       watchdog@66090000 {
> > -               compatible = "arm,sp805", "arm,primecell";
> > -               reg = <0x66090000 0x1000>;
> > -               interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
> > -               clocks = <&wdt_clk>, <&apb_pclk>;
> > -               clock-names = "wdog_clk", "apb_pclk";
> > -       };
> > diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> > new file mode 100644
> > index 000000000000..980e155d3387
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ARM AMBA Primecell SP805 Watchdog
> > +
> > +maintainers:
> > +  - Viresh Kumar <vireshk@kernel.org>
> > +
> > +description: |+
> > +  The Arm SP805 IP implements a watchdog device, which triggers an interrupt
> > +  after a configurable time period. If that interrupt has not been serviced
> > +  when the next interrupt would be triggered, the reset signal is asserted.
> > +
> > +allOf:
> > +  - $ref: /schemas/arm/primecell.yaml#
>
> Should also ref watchdog.yaml here.

Actually, you should also drop primecell.yaml as that will get applied
already with the 'arm,primecell' compatible match.

Rob