From: Tobias Schramm <t.schramm@manjaro.org>
To: Rob Herring <robh+dt@kernel.org>,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: devicetree@vger.kernel.org,
bcm-kernel-feedback-list@broadcom.com,
linux-kernel@vger.kernel.org,
Tobias Schramm <t.schramm@manjaro.org>
Subject: [PATCH 1/1] ARM: dts: bcm2711: Enable ddr modes on emmc2 controller
Date: Sun, 30 Aug 2020 01:15:09 +0200 [thread overview]
Message-ID: <20200829231509.543901-2-t.schramm@manjaro.org> (raw)
In-Reply-To: <20200829231509.543901-1-t.schramm@manjaro.org>
This patch enables ddr modes for eMMC and SD storage on emmc2,
doubling transfer speed. Previously only single data rate modes were
used, wasting half the available throughput.
The bcm2711 supports both SD and eMMC storage using ddr modes. Testing
show that pcb layout of the Raspberry Pi 4 can support them, too.
Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
index 222d7825e1ab..8b61e258e906 100644
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
@@ -191,6 +191,8 @@ &emmc2 {
vqmmc-supply = <&sd_io_1v8_reg>;
vmmc-supply = <&sd_vcc_reg>;
broken-cd;
+ mmc-ddr-3_3v;
+ sd-uhs-ddr50;
status = "okay";
};
--
2.28.0
next prev parent reply other threads:[~2020-08-29 23:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-29 23:15 [PATCH 0/1] Enable ddr modes on emmc2 of Raspberry Pi 4 B Tobias Schramm
2020-08-29 23:15 ` Tobias Schramm [this message]
2020-08-31 22:00 ` [PATCH 1/1] ARM: dts: bcm2711: Enable ddr modes on emmc2 controller Florian Fainelli
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