From: "Jason A. Donenfeld" <Jason@zx2c4.com>
To: x86@kernel.org, linux-kernel@vger.kernel.org
Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>, Borislav Petkov <bp@suse.de>
Subject: [PATCH] x86/msr: do not warn on writes to OC_MAILBOX
Date: Mon, 7 Sep 2020 11:48:43 +0200 [thread overview]
Message-ID: <20200907094843.1949-1-Jason@zx2c4.com> (raw)
Popular tools, like intel-undervolt, use MSR 0x150 to control the CPU
voltage offset. In fact, evidently the intel_turbo_max_3 driver in-tree
also uses this MSR. So, teach the kernel's MSR list about this, so that
intel-undervolt and other such tools don't spew warnings to dmesg, while
unifying the constant used throughout the kernel.
Fixes: a7e1f67ed29f ("x86/msr: Filter MSR writes")
Cc: Borislav Petkov <bp@suse.de>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
---
arch/x86/include/asm/msr-index.h | 2 ++
arch/x86/kernel/msr.c | 5 ++++-
drivers/platform/x86/intel_turbo_max_3.c | 6 +++---
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2859ee4f39a8..0bcb3604d0e2 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -132,6 +132,8 @@
#define MSR_IA32_MCU_OPT_CTRL 0x00000123
#define RNGDS_MITG_DIS BIT(0)
+#define MSR_IA32_OC_MAILBOX 0x00000150
+
#define MSR_IA32_SYSENTER_CS 0x00000174
#define MSR_IA32_SYSENTER_ESP 0x00000175
#define MSR_IA32_SYSENTER_EIP 0x00000176
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 49dcfb85e773..64f6200681e3 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -86,8 +86,11 @@ static int filter_write(u32 reg)
default: break;
}
- if (reg == MSR_IA32_ENERGY_PERF_BIAS)
+ switch (reg) {
+ case MSR_IA32_ENERGY_PERF_BIAS:
+ case MSR_IA32_OC_MAILBOX:
return 0;
+ }
pr_err_ratelimited("Write to unrecognized MSR 0x%x by %s\n"
"Please report to x86@kernel.org\n",
diff --git a/drivers/platform/x86/intel_turbo_max_3.c b/drivers/platform/x86/intel_turbo_max_3.c
index 892140b62898..991cdbc3295b 100644
--- a/drivers/platform/x86/intel_turbo_max_3.c
+++ b/drivers/platform/x86/intel_turbo_max_3.c
@@ -17,8 +17,8 @@
#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
+#include <asm/msr.h>
-#define MSR_OC_MAILBOX 0x150
#define MSR_OC_MAILBOX_CMD_OFFSET 32
#define MSR_OC_MAILBOX_RSP_OFFSET 32
#define MSR_OC_MAILBOX_BUSY_BIT 63
@@ -41,14 +41,14 @@ static int get_oc_core_priority(unsigned int cpu)
value = cmd << MSR_OC_MAILBOX_CMD_OFFSET;
/* Set the busy bit to indicate OS is trying to issue command */
value |= BIT_ULL(MSR_OC_MAILBOX_BUSY_BIT);
- ret = wrmsrl_safe(MSR_OC_MAILBOX, value);
+ ret = wrmsrl_safe(MSR_IA32_OC_MAILBOX, value);
if (ret) {
pr_debug("cpu %d OC mailbox write failed\n", cpu);
return ret;
}
for (i = 0; i < OC_MAILBOX_RETRY_COUNT; ++i) {
- ret = rdmsrl_safe(MSR_OC_MAILBOX, &value);
+ ret = rdmsrl_safe(MSR_IA32_OC_MAILBOX, &value);
if (ret) {
pr_debug("cpu %d OC mailbox read failed\n", cpu);
break;
--
2.28.0
next reply other threads:[~2020-09-07 9:48 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-07 9:48 Jason A. Donenfeld [this message]
2020-09-07 10:06 ` [PATCH] x86/msr: do not warn on writes to OC_MAILBOX Borislav Petkov
2020-09-07 10:46 ` Jason A. Donenfeld
2020-09-07 11:11 ` Borislav Petkov
2020-09-07 11:15 ` Jason A. Donenfeld
2020-09-07 11:23 ` Borislav Petkov
2020-09-08 17:10 ` Srinivas Pandruvada
2020-09-08 17:12 ` Jason A. Donenfeld
2020-09-08 17:25 ` Borislav Petkov
2020-09-08 17:29 ` Jason A. Donenfeld
2020-09-08 17:36 ` Borislav Petkov
2020-09-08 17:42 ` Jason A. Donenfeld
2020-09-08 18:01 ` Borislav Petkov
2020-09-08 19:07 ` Jason A. Donenfeld
2020-09-08 19:18 ` Sultan Alsawaf
2020-09-08 19:30 ` Borislav Petkov
2020-09-08 20:35 ` Andy Lutomirski
2020-09-08 22:32 ` Matthew Garrett
2020-09-09 23:56 ` Andy Lutomirski
2020-09-09 1:02 ` Srinivas Pandruvada
2020-09-10 0:08 ` Andy Lutomirski
2020-10-19 17:15 ` Borislav Petkov
2020-10-20 17:21 ` Srinivas Pandruvada
2020-10-20 17:47 ` Borislav Petkov
2020-10-20 18:40 ` Srinivas Pandruvada
2020-10-20 19:40 ` Dave Hansen
2020-10-21 13:11 ` Srinivas Pandruvada
2020-10-22 19:28 ` Borislav Petkov
2020-10-21 13:24 ` Peter Zijlstra
2020-09-08 17:31 ` Borislav Petkov
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