From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3C0EC433E2 for ; Mon, 7 Sep 2020 11:32:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A7E76207C3 for ; Mon, 7 Sep 2020 11:32:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728586AbgIGLcV (ORCPT ); Mon, 7 Sep 2020 07:32:21 -0400 Received: from foss.arm.com ([217.140.110.172]:33210 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728999AbgIGLZ1 (ORCPT ); Mon, 7 Sep 2020 07:25:27 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81E7B11D4; Mon, 7 Sep 2020 04:25:23 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 86AD33F66E; Mon, 7 Sep 2020 04:25:21 -0700 (PDT) Date: Mon, 7 Sep 2020 12:25:19 +0100 From: Lorenzo Pieralisi To: Lad Prabhakar Cc: Geert Uytterhoeven , Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Magnus Damm , Kishon Vijay Abraham I , Arnd Bergmann , Greg Kroah-Hartman , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Prabhakar Subject: Re: [PATCH 0/3] Add PCIe EP to RZ/G2H Message-ID: <20200907112519.GB7573@e121166-lin.cambridge.arm.com> References: <20200904103851.3946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200904103851.3946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 04, 2020 at 11:38:48AM +0100, Lad Prabhakar wrote: > Hi All, > > This patch series adds PCIe EP support to R8A774E1 SoC. > > patch 2/3 applies on top of [1] and patch 3/3 is dependent > on series [2]. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/ > renesas-devel.git/log/?h=renesas-arm-dt-for-v5.10 > [2] https://patchwork.kernel.org/project/linux-pci/list/ > ?series=332849&submitter=&state=&q=&archive=&delegate= > > Cheers, > Prabhakar > > > Lad Prabhakar (3): > dt-bindings: pci: rcar-pci-ep: Document r8a774e1 > arm64: dts: renesas: r8a774e1: Add PCIe EP nodes > misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller > > .../devicetree/bindings/pci/rcar-pci-ep.yaml | 1 + > arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 38 +++++++++++++++++++ > drivers/misc/pci_endpoint_test.c | 2 + > 3 files changed, 41 insertions(+) Took patches (1) and (3) in pci/rcar, thanks. Lorenzo