From: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Shivamurthy Shastri <sshivamurthy@micron.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Chuanhong Guo <gch981213@gmail.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
Subject: [PATCH v4 2/2] mtd: spinand: micron: add support for MT29F2G01AAAED
Date: Mon, 14 Sep 2020 00:15:33 +0800 [thread overview]
Message-ID: <20200913161533.10655-3-nthirumalesha7@gmail.com> (raw)
In-Reply-To: <20200913161533.10655-1-nthirumalesha7@gmail.com>
The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit
ECC
Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
---
drivers/mtd/nand/spi/micron.c | 64 +++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index d1b1073d1a55..dae3f7189880 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -44,6 +44,19 @@ static SPINAND_OP_VARIANTS(x4_update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
+/* Micron MT29F2G01AAAED Device */
+static SPINAND_OP_VARIANTS(x4_read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(x1_write_cache_variants,
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(x1_update_cache_variants,
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
@@ -74,6 +87,47 @@ static const struct mtd_ooblayout_ops micron_grouped_ooblayout = {
.free = micron_8_ooblayout_free,
};
+static int micron_4_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ struct spinand_device *spinand = mtd_to_spinand(mtd);
+
+ if (section >= spinand->base.memorg.pagesize /
+ mtd->ecc_step_size)
+ return -ERANGE;
+
+ region->offset = (section * 16) + 8;
+ region->length = 8;
+
+ return 0;
+}
+
+static int micron_4_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ struct spinand_device *spinand = mtd_to_spinand(mtd);
+
+ if (section >= spinand->base.memorg.pagesize /
+ mtd->ecc_step_size)
+ return -ERANGE;
+
+ if (section) {
+ region->offset = 16 * section;
+ region->length = 8;
+ } else {
+ /* section 0 has two bytes reserved for the BBM */
+ region->offset = 2;
+ region->length = 6;
+ }
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops micron_interleaved_ooblayout = {
+ .ecc = micron_4_ooblayout_ecc,
+ .free = micron_4_ooblayout_free,
+};
+
static int micron_select_target(struct spinand_device *spinand,
unsigned int target)
{
@@ -217,6 +271,16 @@ static const struct spinand_info micron_spinand_table[] = {
SPINAND_ECCINFO(µn_grouped_ooblayout,
micron_8_ecc_get_status),
SPINAND_SELECT_TARGET(micron_select_target)),
+ /* M69A 2Gb 3.3V */
+ SPINAND_INFO("MT29F2G01AAAED",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9F),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 80, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&x4_read_cache_variants,
+ &x1_write_cache_variants,
+ &x1_update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(µn_interleaved_ooblayout, NULL)),
};
static int micron_spinand_init(struct spinand_device *spinand)
--
2.25.1
prev parent reply other threads:[~2020-09-13 16:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-13 16:15 [PATCH v4 0/2] Add support for micron SPI NAND MT29F2G01AAAED Thirumalesha Narasimhappa
2020-09-13 16:15 ` [PATCH v4 1/2] mtd: spinand: micron: Generalize the function and structure names Thirumalesha Narasimhappa
2020-09-15 8:13 ` Miquel Raynal
[not found] ` <CALKVOUomKLZ5GEHmXb+VfEq8UiNUpCN-Vqkx3N+yykEnCrHkDA@mail.gmail.com>
2020-09-28 14:55 ` Miquel Raynal
2020-09-28 15:45 ` Boris Brezillon
2020-09-28 15:50 ` Miquel Raynal
2020-09-28 16:03 ` Boris Brezillon
2020-09-28 16:21 ` Miquel Raynal
2020-09-28 16:25 ` Boris Brezillon
2020-09-13 16:15 ` Thirumalesha Narasimhappa [this message]
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