From: Gavin Shan <gshan@redhat.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, anshuman.khandual@arm.com,
catalin.marinas@arm.com, will@kernel.org,
linux-kernel@vger.kernel.org, shan.gavin@gmail.com
Subject: [PATCH 0/2] arm64/mm: Enable color zero pages
Date: Wed, 16 Sep 2020 13:25:21 +1000 [thread overview]
Message-ID: <20200916032523.13011-1-gshan@redhat.com> (raw)
The feature of color zero pages isn't enabled on arm64, meaning all
read-only (anonymous) VM areas are backed up by same zero page. It
leads pressure to L1 (data) cache on reading data from them. This
tries to enable color zero pages.
PATCH[1/2] decouples the zero PGD table from zero page
PATCH[2/2] allocates the needed zero pages according to L1 cache size
Gavin Shan (2):
arm64/mm: Introduce zero PGD table
arm64/mm: Enable color zero pages
arch/arm64/include/asm/cache.h | 22 +++++++++++++++++
arch/arm64/include/asm/mmu_context.h | 6 ++---
arch/arm64/include/asm/pgtable.h | 11 +++++++--
arch/arm64/kernel/cacheinfo.c | 34 +++++++++++++++++++++++++++
arch/arm64/kernel/setup.c | 2 +-
arch/arm64/kernel/vmlinux.lds.S | 4 ++++
arch/arm64/mm/init.c | 35 ++++++++++++++++++++++++++++
arch/arm64/mm/mmu.c | 7 ------
arch/arm64/mm/proc.S | 2 +-
9 files changed, 109 insertions(+), 14 deletions(-)
--
2.23.0
next reply other threads:[~2020-09-16 3:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-16 3:25 Gavin Shan [this message]
2020-09-16 3:25 ` [PATCH 1/2] arm64/mm: Introduce zero PGD table Gavin Shan
2020-09-16 3:25 ` [PATCH 2/2] arm64/mm: Enable color zero pages Gavin Shan
2020-09-16 8:28 ` Will Deacon
2020-09-16 10:46 ` Robin Murphy
2020-09-17 4:36 ` Gavin Shan
2020-09-17 3:35 ` Gavin Shan
2020-09-17 10:22 ` Robin Murphy
2020-09-21 2:56 ` Gavin Shan
2020-09-21 12:40 ` Anshuman Khandual
2020-09-22 12:39 ` Gavin Shan
2020-09-18 12:10 ` kernel test robot
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