From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A48ECC2D0E3 for ; Thu, 17 Sep 2020 17:31:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5CD4C2137B for ; Thu, 17 Sep 2020 17:31:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600363908; bh=NudZN54sc5i4qumVD3ViKxr7+VKLAtm733yj4DizhGk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=ennhFY80iAFYSZwLZoJG4cVDHYjvr4svDqiHKXZyxTfghQBMYwbLra+ORMvGgcoWX HbvF6bGy8cAMLrp1b8zm6rtwdSNYLK7kOJ5QHxPylS7QboU1jZo+vniWkpE8SlGgNp kzx+jUqoqh8hO4lZXwi48U6MFZOdoW4fl9Oa9sTs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726262AbgIQRbq (ORCPT ); Thu, 17 Sep 2020 13:31:46 -0400 Received: from mail.kernel.org ([198.145.29.99]:36540 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726597AbgIQR30 (ORCPT ); Thu, 17 Sep 2020 13:29:26 -0400 Received: from archlinux (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2E0DF221EC; Thu, 17 Sep 2020 17:28:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600363707; bh=NudZN54sc5i4qumVD3ViKxr7+VKLAtm733yj4DizhGk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=W/aMRUUNvIyM2brFmCUJW+GQFXIuQGJ7swGeNT+UXIdn2qWVNj2Qlxqbl44zup4yN 4f4BA+cO4gSeNxjI9b3Yr+I9HDyAy3PJ1CsPdtKXgaWAB7AR3HcfsUjJJ1oe/3U5GG EY+yOYeRquvprpdDFKcmd4w8+GHDwWNjsxAuNock= Date: Thu, 17 Sep 2020 18:28:22 +0100 From: Jonathan Cameron To: Eugen Hristev Cc: , , , Subject: Re: [PATCH] iio: adc: at91-sama5d2_adc: fix DMA conversion crash Message-ID: <20200917182822.5134767d@archlinux> In-Reply-To: <20200916070821.118374-1-eugen.hristev@microchip.com> References: <20200916070821.118374-1-eugen.hristev@microchip.com> X-Mailer: Claws Mail 3.17.6 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 16 Sep 2020 10:08:21 +0300 Eugen Hristev wrote: > After the move of the postenable code to preenable, the DMA start was > done before the DMA init, which is not correct. > The DMA is initialized in set_watermark. Because of this, we need to call > the DMA start functions in set_watermark, after the DMA init, instead of > preenable hook, when the DMA is not properly setup yet. > > Fixes: f3c034f61775 ("iio: at91-sama5d2_adc: adjust iio_triggered_buffer_{predisable,postenable} positions") > Signed-off-by: Eugen Hristev Basic approach looks fine, but if we were to get an error from the buffer_prepare() function, should we be looking to disable dma if we enabled it earlier in the set_watermark callback? > --- > > Hi, > > This crash is in the kernel since 5.8-rc1 > > Please have a look at discussion here: > https://lore.kernel.org/linux-iio/CA+U=DsqRUtjjoe5nevP_wNxTgr27+O2V1h9w7d3QijBQ+5f3XA@mail.gmail.com/T/#t > > Thanks ! > > drivers/iio/adc/at91-sama5d2_adc.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c > index de9583d6cddd..b5196797dcb8 100644 > --- a/drivers/iio/adc/at91-sama5d2_adc.c > +++ b/drivers/iio/adc/at91-sama5d2_adc.c > @@ -884,7 +884,7 @@ static bool at91_adc_current_chan_is_touch(struct iio_dev *indio_dev) > AT91_SAMA5D2_MAX_CHAN_IDX + 1); > } > > -static int at91_adc_buffer_preenable(struct iio_dev *indio_dev) > +static int at91_adc_buffer_prepare(struct iio_dev *indio_dev) > { > int ret; > u8 bit; > @@ -901,7 +901,7 @@ static int at91_adc_buffer_preenable(struct iio_dev *indio_dev) > /* we continue with the triggered buffer */ > ret = at91_adc_dma_start(indio_dev); > if (ret) { > - dev_err(&indio_dev->dev, "buffer postenable failed\n"); > + dev_err(&indio_dev->dev, "buffer prepare failed\n"); > return ret; > } > > @@ -989,7 +989,6 @@ static int at91_adc_buffer_postdisable(struct iio_dev *indio_dev) > } > > static const struct iio_buffer_setup_ops at91_buffer_setup_ops = { > - .preenable = &at91_adc_buffer_preenable, > .postdisable = &at91_adc_buffer_postdisable, > }; > > @@ -1586,7 +1585,11 @@ static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val) > else if (val > 1) > at91_adc_dma_init(to_platform_device(&indio_dev->dev)); > > - return 0; > + /* > + * We can start the DMA only after setting the watermark and > + * having the DMA initialization completed > + */ Looks superficially to me like we may need to unwind some stuff if this fails. > + return at91_adc_buffer_prepare(indio_dev); > } > > static int at91_adc_update_scan_mode(struct iio_dev *indio_dev,