From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D15AC4346E for ; Thu, 24 Sep 2020 15:54:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 074A9238A1 for ; Thu, 24 Sep 2020 15:54:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728548AbgIXPyJ (ORCPT ); Thu, 24 Sep 2020 11:54:09 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:53444 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728285AbgIXPyI (ORCPT ); Thu, 24 Sep 2020 11:54:08 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kLTZD-00G2qi-MO; Thu, 24 Sep 2020 17:53:55 +0200 Date: Thu, 24 Sep 2020 17:53:55 +0200 From: Andrew Lunn To: Kai-Heng Feng Cc: jeffrey.t.kirsher@intel.com, "David S. Miller" , Jakub Kicinski , "moderated list:INTEL ETHERNET DRIVERS" , "open list:NETWORKING DRIVERS" , open list Subject: Re: [PATCH v2] e1000e: Increase iteration on polling MDIC ready bit Message-ID: <20200924155355.GC3821492@lunn.ch> References: <20200923074751.10527-1-kai.heng.feng@canonical.com> <20200924150958.18016-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200924150958.18016-1-kai.heng.feng@canonical.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 24, 2020 at 11:09:58PM +0800, Kai-Heng Feng wrote: > We are seeing the following error after S3 resume: > [ 704.746874] e1000e 0000:00:1f.6 eno1: Setting page 0x6020 > [ 704.844232] e1000e 0000:00:1f.6 eno1: MDI Write did not complete > [ 704.902817] e1000e 0000:00:1f.6 eno1: Setting page 0x6020 > [ 704.903075] e1000e 0000:00:1f.6 eno1: reading PHY page 769 (or 0x6020 shifted) reg 0x17 > [ 704.903281] e1000e 0000:00:1f.6 eno1: Setting page 0x6020 > [ 704.903486] e1000e 0000:00:1f.6 eno1: writing PHY page 769 (or 0x6020 shifted) reg 0x17 > [ 704.943155] e1000e 0000:00:1f.6 eno1: MDI Error > ... > [ 705.108161] e1000e 0000:00:1f.6 eno1: Hardware Error > > As Andrew Lunn pointed out, MDIO has nothing to do with phy, and indeed > increase polling iteration can resolve the issue. > > While at it, also move the delay to the end of loop, to potentially save > 50 us. You are unlikely to save any time. 64 bits at 2.5MHz is 25.6uS. So it is very unlikely doing a read directly after setting is going is going to have E1000_MDIC_READY set. So this change likely causes an addition read on MDIC. Did you profile this at all, for the normal case? I also don't fully understand the fix. You are now looping up to 6400 times, each with a delay of 50uS. So that is around 12800 times more than it actually needs to transfer the 64 bits! I've no idea how this hardware works, but my guess would be, something is wrong with the clock setup? Andrew