From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Zhen Lei <thunder.leizhen@huawei.com>
Cc: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Kefeng Wang <wangkefeng.wang@huawei.com>,
Libin <huawei.libin@huawei.com>
Subject: Re: [PATCH v3 21/21] dt-bindings: arm: hisilicon: convert LPC controller bindings to json-schema
Date: Mon, 28 Sep 2020 10:52:58 +0100 [thread overview]
Message-ID: <20200928105258.000016c5@Huawei.com> (raw)
In-Reply-To: <20200927062129.4573-22-thunder.leizhen@huawei.com>
On Sun, 27 Sep 2020 14:21:29 +0800
Zhen Lei <thunder.leizhen@huawei.com> wrote:
> Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC)
> controller binding to DT schema format using json-schema.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
As only single entries in the oneOf, can just use an enum.
Thanks,
Jonathan
> ---
> .../arm/hisilicon/hisilicon-low-pin-count.txt | 33 ------------
> .../arm/hisilicon/hisilicon-low-pin-count.yaml | 63 ++++++++++++++++++++++
> 2 files changed, 63 insertions(+), 33 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
> create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
> deleted file mode 100644
> index 10bd35f9207f2ee..000000000000000
> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -Hisilicon Hip06 Low Pin Count device
> - Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
> - provides I/O access to some legacy ISA devices.
> - Hip06 is based on arm64 architecture where there is no I/O space. So, the
> - I/O ports here are not CPU addresses, and there is no 'ranges' property in
> - LPC device node.
> -
> -Required properties:
> -- compatible: value should be as follows:
> - (a) "hisilicon,hip06-lpc"
> - (b) "hisilicon,hip07-lpc"
> -- #address-cells: must be 2 which stick to the ISA/EISA binding doc.
> -- #size-cells: must be 1 which stick to the ISA/EISA binding doc.
> -- reg: base memory range where the LPC register set is mapped.
> -
> -Note:
> - The node name before '@' must be "isa" to represent the binding stick to the
> - ISA/EISA binding specification.
> -
> -Example:
> -
> -isa@a01b0000 {
> - compatible = "hisilicon,hip06-lpc";
> - #address-cells = <2>;
> - #size-cells = <1>;
> - reg = <0x0 0xa01b0000 0x0 0x1000>;
> -
> - ipmi0: bt@e4 {
> - compatible = "ipmi-bt";
> - device_type = "ipmi";
> - reg = <0x01 0xe4 0x04>;
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.yaml
> new file mode 100644
> index 000000000000000..a43f8b65547c10f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/hisilicon/hisilicon-low-pin-count.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Hip06 Low Pin Count device
> +
> +maintainers:
> + - Wei Xu <xuwei5@hisilicon.com>
> +
> +description: |
> + Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
> + provides I/O access to some legacy ISA devices.
> + Hip06 is based on arm64 architecture where there is no I/O space. So, the
> + I/O ports here are not CPU addresses, and there is no 'ranges' property in
> + LPC device node.
> +
> +properties:
> + $nodename:
> + pattern: '^isa@[0-9a-f]+$'
> + description: |
> + The node name before '@' must be "isa" to represent the binding stick
> + to the ISA/EISA binding specification.
> +
> + compatible:
> + oneOf:
> + - items:
> + - const: hisilicon,hip06-lpc
> + - items:
> + - const: hisilicon,hip07-lpc
enum:
- hisilicon,hip06-lpc
- hisilicon,hip07-lpc
> +
> + reg:
> + description: base memory range where the LPC register set is mapped.
> + maxItems: 1
> +
> + '#address-cells':
> + description: must be 2 which stick to the ISA/EISA binding doc.
> + const: 2
> +
> + '#size-cells':
> + description: must be 1 which stick to the ISA/EISA binding doc.
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + isa@a01b0000 {
> + compatible = "hisilicon,hip06-lpc";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + reg = <0xa01b0000 0x1000>;
> +
> + ipmi0: bt@e4 {
> + compatible = "ipmi-bt";
> + device_type = "ipmi";
> + reg = <0x01 0xe4 0x04>;
> + };
> + };
> +...
> \ No newline at end of file
next prev parent reply other threads:[~2020-09-28 9:54 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-27 6:21 [PATCH v3 00/21] add support for Hisilicon SD5203 SoC Zhen Lei
2020-09-27 6:21 ` [PATCH v3 01/21] ARM: dts: remove a unused compatible name in hip01-ca9x2.dts Zhen Lei
2020-09-27 6:21 ` [PATCH v3 02/21] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Zhen Lei
2020-09-28 12:37 ` Wei Xu
2020-09-28 12:51 ` Leizhen (ThunderTown)
2020-09-27 6:21 ` [PATCH v3 03/21] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema Zhen Lei
2020-09-28 12:05 ` Wei Xu
2020-09-28 12:14 ` Leizhen (ThunderTown)
2020-09-27 6:21 ` [PATCH v3 04/21] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Zhen Lei
2020-09-27 6:21 ` [PATCH v3 05/21] ARM: hisi: add support " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 06/21] ARM: debug: add UART early console support for SD5203 Zhen Lei
2020-09-27 6:21 ` [PATCH v3 07/21] ARM: dts: add SD5203 dts Zhen Lei
2020-09-27 6:21 ` [PATCH v3 08/21] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Zhen Lei
2020-09-28 9:44 ` Jonathan Cameron
2020-09-28 10:59 ` Leizhen (ThunderTown)
2020-09-27 6:21 ` [PATCH v3 09/21] dt-bindings: arm: hisilicon: convert hisilicon,peri-subctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 10/21] dt-bindings: arm: hisilicon: convert hisilicon,pcie-sas-subctrl " Zhen Lei
2020-09-28 9:46 ` [PATCH v3 10/21] dt-bindings: arm: hisilicon: convert hisilicon, pcie-sas-subctrl " Jonathan Cameron
2020-09-28 11:16 ` Leizhen (ThunderTown)
2020-09-27 6:21 ` [PATCH v3 11/21] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 12/21] dt-bindings: arm: hisilicon: convert hisilicon,pctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 13/21] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 14/21] dt-bindings: arm: hisilicon: convert hisilicon,dsa-subctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 15/21] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 16/21] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 17/21] dt-bindings: arm: hisilicon: convert hisilicon,hi6220-aoctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 18/21] dt-bindings: arm: hisilicon: convert hisilicon,hi6220-mediactrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 19/21] dt-bindings: arm: hisilicon: convert hisilicon,hi6220-pmctrl " Zhen Lei
2020-09-27 6:21 ` [PATCH v3 20/21] dt-bindings: arm: hisilicon: convert hisilicon,hi6220-sramctrl " Zhen Lei
2020-09-28 9:50 ` [PATCH v3 20/21] dt-bindings: arm: hisilicon: convert hisilicon, hi6220-sramctrl " Jonathan Cameron
2020-09-28 11:16 ` Leizhen (ThunderTown)
2020-09-27 6:21 ` [PATCH v3 21/21] dt-bindings: arm: hisilicon: convert LPC controller " Zhen Lei
2020-09-28 9:52 ` Jonathan Cameron [this message]
2020-09-28 11:19 ` Leizhen (ThunderTown)
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