From: Thierry Reding <thierry.reding@gmail.com>
To: JC Kuo <jckuo@nvidia.com>
Cc: gregkh@linuxfoundation.org, robh@kernel.org,
jonathanh@nvidia.com, kishon@ti.com, linux-tegra@vger.kernel.org,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, nkristam@nvidia.com
Subject: Re: [PATCH v3 06/15] phy: tegra: xusb: Add Tegra210 lane_iddq operation
Date: Mon, 28 Sep 2020 15:10:10 +0200 [thread overview]
Message-ID: <20200928131010.GG3065790@ulmo> (raw)
In-Reply-To: <20200909081041.3190157-7-jckuo@nvidia.com>
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On Wed, Sep 09, 2020 at 04:10:32PM +0800, JC Kuo wrote:
> As per Tegra210 TRM, before changing lane assignments, driver should
> keep lanes in IDDQ and sleep state; after changing lane assignments,
> driver should bring lanes out of IDDQ.
> This commit implements the required operations.
>
> Signed-off-by: JC Kuo <jckuo@nvidia.com>
> ---
> v3:
> add 'misc_ctl2' data member to UPHY lane for carrying MISC_PAD_PX_CTL2 offset
> tegra210_uphy_lane_iddq_[enable/disable]() to access 'misc_ctl2' data member
>
> drivers/phy/tegra/xusb-tegra210.c | 82 ++++++++++++++++++++++++++++---
> drivers/phy/tegra/xusb.c | 6 +++
> drivers/phy/tegra/xusb.h | 6 +++
> 3 files changed, 86 insertions(+), 8 deletions(-)
Acked-by: Thierry Reding <treding@nvidia.com>
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next prev parent reply other threads:[~2020-09-28 13:10 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 8:10 [PATCH v3 00/15] Tegra XHCI controller ELPG support JC Kuo
2020-09-09 8:10 ` [PATCH v3 01/15] clk: tegra: Add PLLE HW power sequencer control JC Kuo
2020-09-28 12:51 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 02/15] clk: tegra: Don't enable PLLE HW sequencer at init JC Kuo
2020-09-28 12:52 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 03/15] phy: tegra: xusb: Move usb3 port init for Tegra210 JC Kuo
2020-09-28 13:03 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL JC Kuo
2020-09-28 13:06 ` Thierry Reding
2020-10-14 3:21 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210 JC Kuo
2020-09-28 13:08 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 06/15] phy: tegra: xusb: Add Tegra210 lane_iddq operation JC Kuo
2020-09-28 13:10 ` Thierry Reding [this message]
2020-09-09 8:10 ` [PATCH v3 07/15] phy: tegra: xusb: Add sleepwalk and suspend/resume JC Kuo
2020-09-28 13:11 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 08/15] soc/tegra: pmc: Provide usb sleepwalk register map JC Kuo
2020-09-28 13:17 ` Thierry Reding
2020-10-14 4:08 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 09/15] arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop JC Kuo
2020-09-28 13:18 ` Thierry Reding
2020-10-14 4:15 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 10/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra210 JC Kuo
2020-09-28 13:40 ` Thierry Reding
2020-10-14 8:37 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 11/15] phy: tegra: xusb: Tegra210 host mode VBUS control JC Kuo
2020-09-28 13:42 ` Thierry Reding
2020-09-09 8:10 ` [PATCH v3 12/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra186 JC Kuo
2020-09-28 13:50 ` Thierry Reding
2020-10-15 8:08 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 13/15] arm64: tegra210/tegra186/tegra194: XUSB PADCTL irq JC Kuo
2020-09-09 8:10 ` [PATCH v3 14/15] usb: host: xhci-tegra: Unlink power domain devices JC Kuo
2020-09-28 13:53 ` Thierry Reding
2020-10-15 8:09 ` JC Kuo
2020-09-09 8:10 ` [PATCH v3 15/15] xhci: tegra: Enable ELPG for runtime/system PM JC Kuo
2020-09-28 14:06 ` Thierry Reding
2020-10-15 8:12 ` JC Kuo
2020-09-28 12:54 ` [PATCH v3 00/15] Tegra XHCI controller ELPG support Thierry Reding
2020-10-14 2:26 ` JC Kuo
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