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From: Jordan Crouse <jcrouse@codeaurora.org>
To: kholk11@gmail.com
Cc: robdclark@gmail.com, sean@poorly.run, airlied@linux.ie,
	daniel@ffwll.ch, konradybcio@gmail.com, marijns95@gmail.com,
	martin.botka1@gmail.com, linux-arm-msm@vger.kernel.org,
	freedreno@lists.freedesktop.org, phone-devel@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/7] drm/msm/a5xx: Reset VBIF before PC only on A510 and A530
Date: Mon, 28 Sep 2020 10:25:56 -0600	[thread overview]
Message-ID: <20200928162555.GF29832@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20200926125146.12859-5-kholk11@gmail.com>

On Sat, Sep 26, 2020 at 02:51:43PM +0200, kholk11@gmail.com wrote:
> From: AngeloGioacchino Del Regno <kholk11@gmail.com>
> 
> Resetting the VBIF before power collapse is done to avoid getting
> bogus FIFO entries during the suspend sequence or subsequent resume,
> but this is doable only on Adreno 510 and Adreno 530, as the other
> units will tendentially lock up.
> Especially on Adreno 508, the GPU will show lockups and very bad
> slownesses after processing the first frame.
> 
> Avoiding to execute the RBBM SW Reset before suspend will stop the
> lockup issue from happening on at least Adreno 508/509/512.

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>

> Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index 9bcbf6cd5a28..00df5de3c8e3 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1306,10 +1306,12 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
>  
>  	/*
>  	 * Reset the VBIF before power collapse to avoid issue with FIFO
> -	 * entries
> +	 * entries on Adreno A510 and A530 (the others will tend to lock up)
>  	 */
> -	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
> -	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
> +	if (adreno_is_a510(adreno_gpu) || adreno_is_a530(adreno_gpu)) {
> +		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
> +		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
> +	}
>  
>  	return msm_gpu_pm_suspend(gpu);
>  }
> -- 
> 2.28.0
> 

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2020-09-28 16:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-26 12:51 [PATCH 0/7] Add support for Adreno 508/509/512 kholk11
2020-09-26 12:51 ` [PATCH 1/7] drm/msm/a5xx: Remove overwriting A5XX_PC_DBG_ECO_CNTL register kholk11
2020-09-28 16:21   ` Jordan Crouse
2020-09-26 12:51 ` [PATCH 2/7] drm/msm/a5xx: Separate A5XX_PC_DBG_ECO_CNTL write from main branch kholk11
2020-09-28 16:22   ` Jordan Crouse
2020-09-26 12:51 ` [PATCH 3/7] drm/msm/a5xx: Add support for Adreno 508, 509, 512 GPUs kholk11
2020-09-26 13:33   ` Martin Botka
2020-09-28 16:24   ` Jordan Crouse
2020-09-26 12:51 ` [PATCH 4/7] drm/msm/a5xx: Reset VBIF before PC only on A510 and A530 kholk11
2020-09-28 16:25   ` Jordan Crouse [this message]
2020-09-26 12:51 ` [PATCH 5/7] drm/msm/a5xx: Fix VPC protect value in gpu_write() kholk11
2020-09-28 16:15   ` Jordan Crouse
2020-09-28 20:29     ` AngeloGioacchino Del Regno
2020-09-26 12:51 ` [PATCH 6/7] drm/msm/a5xx: Disable flat shading optimization kholk11
2020-09-27 18:56   ` Rob Clark
2020-09-26 12:51 ` [PATCH 7/7] drm/msm/a5xx: Disable UCHE global filter kholk11
2020-09-27 18:51   ` Rob Clark

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