From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB815C47420 for ; Tue, 29 Sep 2020 17:49:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 673AA20936 for ; Tue, 29 Sep 2020 17:49:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601401782; bh=xATh57AZpIGmcCcmkus9aGduwYFcRZ27/bzDlNqyfw4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=JcqNnhZPltzebR3nGlg0oPANG9LLprQDGjIdeXVEuAL+ynTXDFK4sJ6NBi9KvLzIv 6Jb2zfCYInVo3FvivXApGWsqi3pNirkFVY9zM69G6Bsquexrx+mIPUaC22utvBEaet gHpfzs1kazWAo0URgk0LH7NCYsP5x2r5FrAubass= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728786AbgI2Rtl (ORCPT ); Tue, 29 Sep 2020 13:49:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:50166 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728198AbgI2Rtl (ORCPT ); Tue, 29 Sep 2020 13:49:41 -0400 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2F765207F7; Tue, 29 Sep 2020 17:49:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1601401779; bh=xATh57AZpIGmcCcmkus9aGduwYFcRZ27/bzDlNqyfw4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qC/LlRTf54MKtIyIZaxFlRRjob6Mb9SKpsvDbkUBIKt5LsXJZ4KbTpUiybtOPrOrx 2w3pzmlTNHYUQR54isna2dg1qbi1qav0PR4DK1nQlSWicZFQhu7vgNislYxQY98Cyz +x07H1ohKx6NTCnmB7jc8P+zbWrtKUetwjXQdQNg= Date: Tue, 29 Sep 2020 18:49:34 +0100 From: Will Deacon To: Rob Herring Cc: Catalin Marinas , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Jiri Olsa , "linux-kernel@vger.kernel.org" , linux-arm-kernel , Alexander Shishkin , Namhyung Kim , Raphael Gault , Mark Rutland , Jonathan Cameron , Ian Rogers , Honnappa Nagarahalli Subject: Re: [PATCH v3 01/10] arm64: pmu: Add hook to handle pmu-related undefined instructions Message-ID: <20200929174933.GF14317@willie-the-truck> References: <20200911215118.2887710-1-robh@kernel.org> <20200911215118.2887710-2-robh@kernel.org> <20200928182601.GA11974@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 29, 2020 at 08:46:46AM -0500, Rob Herring wrote: > On Mon, Sep 28, 2020 at 1:26 PM Will Deacon wrote: > > On Fri, Sep 11, 2020 at 03:51:09PM -0600, Rob Herring wrote: > > > +static int emulate_pmu(struct pt_regs *regs, u32 insn) > > > +{ > > > + u32 rt; > > > + u32 pmuserenr; > > > + > > > + rt = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RT, insn); > > > + pmuserenr = read_sysreg(pmuserenr_el0); > > > + > > > + if ((pmuserenr & (ARMV8_PMU_USERENR_ER|ARMV8_PMU_USERENR_CR)) != > > > + (ARMV8_PMU_USERENR_ER|ARMV8_PMU_USERENR_CR)) > > > + return -EINVAL; > > > + > > > + > > > + /* > > > + * Userspace is expected to only use this in the context of the scheme > > > + * described in the struct perf_event_mmap_page comments. > > > + * > > > + * Given that context, we can only get here if we got migrated between > > > + * getting the register index and doing the MSR read. This in turn > > > + * implies we'll fail the sequence and retry, so any value returned is > > > + * 'good', all we need is to be non-fatal. > > > + * > > > + * The choice of the value 0 is comming from the fact that when > > > + * accessing a register which is not counting events but is accessible, > > > + * we get 0. > > > + */ > > > + pt_regs_write_reg(regs, rt, 0); > > > > Hmm... this feels pretty fragile since, although we may expect userspace only > > to trigger this in the context of the specific perf use-case, we don't have > > a way to detect that, so the ABI we're exposing is that EL0 accesses to > > non-existent counters will return 0. I don't really think that's something > > we want to commit to. > > > > When restartable sequences were added to the kernel, one of the proposed > > use-cases was to allow PMU access on big/little systems, because the > > sequence will abort on preemption. Taking that approach removes the need > > for this emulation hook entirely. Is that something we can rely on instead > > of this emulation hook? > > So back to the RFC version[1]!? That would mean pulling librseq into > the kernel based on the prior discussion. It doesn't look like that > has happened yet. Yeah, or just don't bother supporting heterogeneous systems with this for now. > Why not just drop the undef hook? For heterogeneous systems, we > require userspace to pin itself to cores for a specific PMU. See patch > 9. If userspace fails to do that, then it gets to keep the pieces. Dropping it works too! Will