From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 922B6C4363D for ; Fri, 2 Oct 2020 20:17:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D33C20754 for ; Fri, 2 Oct 2020 20:17:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725790AbgJBURe (ORCPT ); Fri, 2 Oct 2020 16:17:34 -0400 Received: from mga07.intel.com ([134.134.136.100]:14518 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725379AbgJBURd (ORCPT ); Fri, 2 Oct 2020 16:17:33 -0400 IronPort-SDR: nmph4FTvvdGQ2+nWqs9QQYmQoxu+qkSMpACS0rMcxNfLf5ORLAY810DX6zjty/lf40yxhwoLWf zBrITJJp+wOg== X-IronPort-AV: E=McAfee;i="6000,8403,9762"; a="227197745" X-IronPort-AV: E=Sophos;i="5.77,328,1596524400"; d="scan'208";a="227197745" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Oct 2020 13:17:32 -0700 IronPort-SDR: r7Tm7CMo458G1r0vwsZBjEx+VMlUWpH+1KXTiMIYypaOmyRcjujoX+710ccFUGeOf4B5Uvay5S nIhaG7DrquoA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,328,1596524400"; d="scan'208";a="385960864" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga001.jf.intel.com with ESMTP; 02 Oct 2020 13:17:32 -0700 From: Ricardo Neri To: x86@kernel.org, Borislav Petkov , Ingo Molnar , Thomas Gleixner Cc: Len Brown , "Ravi V. Shankar" , linux-kernel@vger.kernel.org, Andy Lutomirski , Tony Luck , "Peter Zijlstra (Intel)" , Ricardo Neri , Andi Kleen , Kan Liang , "Rafael J. Wysocki" , Srinivas Pandruvada Subject: [PATCH 1/3] x86/cpufeatures: Enumerate hybrid CPU feature bit Date: Fri, 2 Oct 2020 13:19:29 -0700 Message-Id: <20201002201931.2826-2-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201002201931.2826-1-ricardo.neri-calderon@linux.intel.com> References: <20201002201931.2826-1-ricardo.neri-calderon@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add feature enumeration to identify a hybrid part: one in which CPUs with more than one type of micro-architecture exists in the same package. Cc: Andi Kleen Cc: Kan Liang Cc: Len Brown Cc: "Peter Zijlstra (Intel)" Cc: "Rafael J. Wysocki" Cc: "Ravi V. Shankar" Cc: Srinivas Pandruvada Cc: linux-kernel@vger.kernel.org Reviewed-by: Tony Luck Signed-off-by: Ricardo Neri --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index dad350d42ecf..26ecc0f2a6fd 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -371,6 +371,7 @@ #define X86_FEATURE_MD_CLEAR (18*32+10) /* VERW clears CPU buffers */ #define X86_FEATURE_TSX_FORCE_ABORT (18*32+13) /* "" TSX_FORCE_ABORT */ #define X86_FEATURE_SERIALIZE (18*32+14) /* SERIALIZE instruction */ +#define X86_FEATURE_HYBRID_CPU (18*32+15) /* This part has CPUs of more than one type */ #define X86_FEATURE_TSXLDTRK (18*32+16) /* TSX Suspend Load Address Tracking */ #define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */ #define X86_FEATURE_ARCH_LBR (18*32+19) /* Intel ARCH LBR */ -- 2.17.1