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From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Greentime Hu <greentime.hu@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Andrew Morton <akpm@linux-foundation.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Anup Patel <anup@brainfault.org>, Arnd Bergmann <arnd@arndb.de>,
	Atish Patra <atish.patra@wdc.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	David Hildenbrand <david@redhat.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jia He <justin.he@arm.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Kefeng Wang <wangkefeng.wang@huawei.com>,
	linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org,
	Mike Rapoport <rppt@kernel.org>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Steven Price <steven.price@arm.com>,
	Will Deacon <will@kernel.org>, Zong Li <zong.li@sifive.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 4/5] riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING
Date: Mon,  5 Oct 2020 17:17:51 -0700	[thread overview]
Message-ID: <20201006001752.248564-5-atish.patra@wdc.com> (raw)
In-Reply-To: <20201006001752.248564-1-atish.patra@wdc.com>

From: Greentime Hu <greentime.hu@sifive.com>

These two functions are used to distinguish between PROT_NONENUMA
protections and hinting fault protections.

Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
---
 arch/riscv/include/asm/pgtable.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 515b42f98d34..2751110675e6 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -183,6 +183,11 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
 	return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
 }
 
+static inline pte_t pmd_pte(pmd_t pmd)
+{
+	return __pte(pmd_val(pmd));
+}
+
 /* Yields the page frame number (PFN) of a page table entry */
 static inline unsigned long pte_pfn(pte_t pte)
 {
@@ -286,6 +291,21 @@ static inline pte_t pte_mkhuge(pte_t pte)
 	return pte;
 }
 
+#ifdef CONFIG_NUMA_BALANCING
+/*
+ * See the comment in include/asm-generic/pgtable.h
+ */
+static inline int pte_protnone(pte_t pte)
+{
+	return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
+}
+
+static inline int pmd_protnone(pmd_t pmd)
+{
+	return pte_protnone(pmd_pte(pmd));
+}
+#endif
+
 /* Modify page protection bits */
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
-- 
2.25.1


  parent reply	other threads:[~2020-10-06  0:18 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-06  0:17 [PATCH v4 0/5] Unify NUMA implementation between ARM64 & RISC-V Atish Patra
2020-10-06  0:17 ` [PATCH v4 1/5] numa: Move numa implementation to common code Atish Patra
2020-10-06  0:17 ` [PATCH v4 2/5] arm64, numa: Change the numa init functions name to be generic Atish Patra
2020-11-06 17:14   ` Catalin Marinas
2020-11-06 17:33     ` Atish Patra
2020-11-06 19:08       ` Catalin Marinas
2020-11-07  0:53         ` Atish Patra
2020-10-06  0:17 ` [PATCH v4 3/5] riscv: Separate memory init from paging init Atish Patra
2020-10-22  5:37   ` Anup Patel
2020-11-05 17:34   ` Palmer Dabbelt
2020-10-06  0:17 ` Atish Patra [this message]
2020-10-22  5:38   ` [PATCH v4 4/5] riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING Anup Patel
2020-11-05 17:34   ` Palmer Dabbelt
2020-10-06  0:17 ` [PATCH v4 5/5] riscv: Add numa support for riscv64 platform Atish Patra
2020-10-22  5:40   ` Anup Patel
2020-11-05 17:34   ` Palmer Dabbelt
2020-10-13 20:19 ` [PATCH v4 0/5] Unify NUMA implementation between ARM64 & RISC-V Atish Patra
2020-10-19 21:29   ` Palmer Dabbelt
2020-11-05 18:07 ` Palmer Dabbelt
2020-11-06 17:18   ` Catalin Marinas

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