From: Ricardo Neri <email@example.com> To: Borislav Petkov <firstname.lastname@example.org> Cc: "Luck, Tony" <email@example.com>, Thomas Gleixner <firstname.lastname@example.org>, email@example.com, Ingo Molnar <firstname.lastname@example.org>, Len Brown <email@example.com>, "Ravi V. Shankar" <firstname.lastname@example.org>, email@example.com, Andy Lutomirski <firstname.lastname@example.org>, "Peter Zijlstra (Intel)" <email@example.com> Subject: Re: [PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs Date: Mon, 5 Oct 2020 17:24:04 -0700 [thread overview] Message-ID: <20201006002404.GB6041@ranerica-svr.sc.intel.com> (raw) In-Reply-To: <20201003090413.GB14035@zn.tnic> On Sat, Oct 03, 2020 at 11:04:29AM +0200, Borislav Petkov wrote: > On Fri, Oct 02, 2020 at 07:17:30PM -0700, Luck, Tony wrote: > > On Sat, Oct 03, 2020 at 03:39:29AM +0200, Thomas Gleixner wrote: > > > On Fri, Oct 02 2020 at 13:19, Ricardo Neri wrote: > > > > Add support to discover and enumerate CPUs in Intel hybrid parts. A hybrid > > > > part has CPUs with more than one type of micro-architecture. Thus, certain > > > > features may only be present in a specific CPU type. > > > > > > > > It is useful to know the type of CPUs present in a system. For instance, > > > > perf may need to handle CPUs differently depending on the type of micro- > > > > architecture. Decoding machine check error logs may need the additional > > > > micro-architecture type information, so include that in the log. > > > > > > 'It is useful' as justification just makes me barf. > > > > This isn't "hetero" ... all of the cores are architecturally the same. > > But it says above "A hybrid part has CPUs with more than one type of > micro-architecture." > > So which is it? Yes, even though they have different micro-architectures, all instructions and features will be the same across CPUs. > > > If CPUID says that some feature is supported, then it will be supported > > on all of the cores. > > Ok. > > > There might be some model specific performance counter events that only > > apply to some cores. > > That sounds like the perf counter scheduling code would have to pay > attention to what is supported. I think we have some functionality for > that due to some AMD parts but I'd prefer if Peter comments here. > > > Or a machine check error code that is logged in the model specific > > MSCOD field of IA32_MCi_STATUS. But any and all code can run on any > > core. > > As long as that is consumed only by userspace I guess that's ok. The > moment someone starts to want to differentiate on what kind of CPU > kernel code runs and acts accordingly, then it becomes ugly so we better > hash it out upfront. We are not planning to implement changes as such. Thanks and BR, Ricardo
next prev parent reply other threads:[~2020-10-06 0:45 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-02 20:19 Ricardo Neri 2020-10-02 20:19 ` [PATCH 1/3] x86/cpufeatures: Enumerate hybrid CPU feature bit Ricardo Neri 2020-10-02 20:19 ` [PATCH 2/3] x86/cpu: Describe hybrid CPUs in cpuinfo_x86 Ricardo Neri 2020-10-02 20:34 ` Borislav Petkov 2020-10-02 21:02 ` Ricardo Neri 2020-10-02 21:03 ` Borislav Petkov 2020-10-02 23:41 ` Ricardo Neri 2020-10-02 20:19 ` [PATCH 3/3] x86/mce: include type of core when reporting a machine check error Ricardo Neri 2020-10-03 1:39 ` [PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs Thomas Gleixner 2020-10-03 2:17 ` Luck, Tony 2020-10-03 9:04 ` Borislav Petkov 2020-10-06 0:24 ` Ricardo Neri [this message] 2020-10-03 10:46 ` Thomas Gleixner 2020-10-03 14:39 ` Peter Zijlstra 2020-10-06 0:21 ` Ricardo Neri
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