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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Mark Brown <broonie@kernel.org>, Serge Semin <fancer.lancer@gmail.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	"wuxu . wu" <wuxu.wu@huawei.com>, Feng Tang <feng.tang@intel.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v4 19/21] spi: dw: Add poll-based SPI transfers support
Date: Thu, 8 Oct 2020 02:55:08 +0300	[thread overview]
Message-ID: <20201007235511.4935-20-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20201007235511.4935-1-Sergey.Semin@baikalelectronics.ru>

A functionality of the poll-based transfer has been removed by
commit 1ceb09717e98 ("spi: dw: remove cs_control and poll_mode members
from chip_data") with a justification that "there is no user of one
anymore". It turns out one of our DW APB SSI core is synthesized with no
IRQ line attached and the only possible way of using it is to implement a
poll-based SPI transfer procedure. So we have to get the removed
functionality back, but with some alterations described below.

First of all the poll-based transfer is activated only if the DW SPI
controller doesn't have an IRQ line attached and the Linux IRQ number is
initialized with the IRQ_NOTCONNECTED value. Secondly the transfer
procedure is now executed with a delay performed between writer and reader
methods. The delay value is calculated based on the number of data words
expected to be received on the current iteration. Finally the errors
status is checked on each iteration.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 drivers/spi/spi-dw-core.c | 40 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 39 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index bcfa224e0e43..2e50cc0a9291 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -364,6 +364,42 @@ static void dw_spi_irq_setup(struct dw_spi *dws)
 	dws->transfer_handler = dw_spi_transfer_handler;
 }
 
+/*
+ * The iterative procedure of the poll-based transfer is simple: write as much
+ * as possible to the Tx FIFO, wait until the pending to receive data is ready
+ * to be read, read it from the Rx FIFO and check whether the performed
+ * procedure has been successful.
+ *
+ * Note this method the same way as the IRQ-based transfer won't work well for
+ * the SPI devices connected to the controller with native CS due to the
+ * automatic CS assertion/de-assertion.
+ */
+static int dw_spi_poll_transfer(struct dw_spi *dws,
+				struct spi_transfer *transfer)
+{
+	struct spi_delay delay;
+	u16 nbits;
+	int ret;
+
+	delay.unit = SPI_DELAY_UNIT_SCK;
+	nbits = dws->n_bytes * BITS_PER_BYTE;
+
+	do {
+		dw_writer(dws);
+
+		delay.value = nbits * (dws->rx_len - dws->tx_len);
+		spi_delay_exec(&delay, transfer);
+
+		dw_reader(dws);
+
+		ret = dw_spi_check_status(dws, true);
+		if (ret)
+			return ret;
+	} while (dws->rx_len);
+
+	return 0;
+}
+
 static int dw_spi_transfer_one(struct spi_controller *master,
 		struct spi_device *spi, struct spi_transfer *transfer)
 {
@@ -408,6 +444,8 @@ static int dw_spi_transfer_one(struct spi_controller *master,
 
 	if (dws->dma_mapped)
 		return dws->dma_ops->dma_transfer(dws, transfer);
+	else if (dws->irq == IRQ_NOTCONNECTED)
+		return dw_spi_poll_transfer(dws, transfer);
 
 	dw_spi_irq_setup(dws);
 
@@ -817,7 +855,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
 
 	ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev),
 			  master);
-	if (ret < 0) {
+	if (ret < 0 && ret != -ENOTCONN) {
 		dev_err(dev, "can not get IRQ\n");
 		goto err_free_master;
 	}
-- 
2.27.0


  parent reply	other threads:[~2020-10-07 23:56 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-07 23:54 [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Serge Semin
2020-10-07 23:54 ` [PATCH v4 01/21] spi: dw: Use an explicit set_cs assignment Serge Semin
2020-10-07 23:54 ` [PATCH v4 02/21] spi: dw: Add DWC SSI capability Serge Semin
2020-10-07 23:54 ` [PATCH v4 03/21] spi: dw: Detach SPI device specific CR0 config method Serge Semin
2020-10-07 23:54 ` [PATCH v4 04/21] spi: dw: Update SPI bus speed in a config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 05/21] spi: dw: Simplify the SPI bus speed config procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 06/21] spi: dw: Update Rx sample delay in the config function Serge Semin
2020-10-07 23:54 ` [PATCH v4 07/21] spi: dw: Add DW SPI controller config structure Serge Semin
2020-10-07 23:54 ` [PATCH v4 08/21] spi: dw: Refactor data IO procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure Serge Semin
2020-10-07 23:54 ` [PATCH v4 10/21] spi: dw: Perform IRQ setup in a dedicated function Serge Semin
2020-10-07 23:55 ` [PATCH v4 11/21] spi: dw: Unmask IRQs after enabling the chip Serge Semin
2020-10-07 23:55 ` [PATCH v4 12/21] spi: dw: Discard chip enabling on DMA setup error Serge Semin
2020-10-07 23:55 ` [PATCH v4 13/21] spi: dw: De-assert chip-select on reset Serge Semin
2020-10-07 23:55 ` [PATCH v4 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion Serge Semin
2020-10-07 23:55 ` [PATCH v4 15/21] spi: dw: Move num-of retries parameter to the header file Serge Semin
2020-10-07 23:55 ` [PATCH v4 16/21] spi: dw: Add generic DW SSI status-check method Serge Semin
2020-10-07 23:55 ` [PATCH v4 17/21] spi: dw: Add memory operations support Serge Semin
2020-10-07 23:55 ` [PATCH v4 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting Serge Semin
2020-10-07 23:55 ` Serge Semin [this message]
2020-10-07 23:55 ` [PATCH v4 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers Serge Semin
2020-10-07 23:55 ` [PATCH v4 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver Serge Semin
2020-10-08 22:02 ` [PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support Mark Brown

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