From: Chenyi Qiang <chenyi.qiang@intel.com> To: Paolo Bonzini <pbonzini@redhat.com>, Sean Christopherson <sean.j.christopherson@intel.com>, Vitaly Kuznetsov <vkuznets@redhat.com>, Wanpeng Li <wanpengli@tencent.com>, Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>, Xiaoyao Li <xiaoyao.li@intel.com> Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC v2 4/7] KVM: MMU: Refactor pkr_mask to cache condition Date: Wed, 14 Oct 2020 10:11:53 +0800 [thread overview] Message-ID: <20201014021157.18022-5-chenyi.qiang@intel.com> (raw) In-Reply-To: <20201014021157.18022-1-chenyi.qiang@intel.com> pkr_mask bitmap indicates if protection key checks are needed for user pages currently. It is indexed by page fault error code bits [4:1] with PFEC.RSVD replaced by the ACC_USER_MASK from the page tables. Refactor it by reverting to the use of PFEC.RSVD. After that, PKS and PKU can share the same bitmap. Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> --- arch/x86/kvm/mmu.h | 10 ++++++---- arch/x86/kvm/mmu/mmu.c | 16 ++++++++++------ 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index 306608248594..597b9159c10b 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -204,11 +204,13 @@ static inline u8 permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, * index of the protection domain, so pte_pkey * 2 is * is the index of the first bit for the domain. */ - pkr_bits = (vcpu->arch.pkru >> (pte_pkey * 2)) & 3; + if (pte_access & PT_USER_MASK) + pkr_bits = (vcpu->arch.pkru >> (pte_pkey * 2)) & 3; + else + pkr_bits = 0; - /* clear present bit, replace PFEC.RSVD with ACC_USER_MASK. */ - offset = (pfec & ~1) + - ((pte_access & PT_USER_MASK) << (PFERR_RSVD_BIT - PT_USER_SHIFT)); + /* clear present bit */ + offset = (pfec & ~1); pkr_bits &= mmu->pkr_mask >> offset; errcode |= -pkr_bits & PFERR_PK_MASK; diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 834a95cf49fa..f9814ab0596d 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4716,21 +4716,25 @@ static void update_pkr_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { unsigned pfec, pkey_bits; - bool check_pkey, check_write, ff, uf, wf, pte_user; + bool check_pkey, check_write, ff, uf, wf, rsvdf; pfec = bit << 1; ff = pfec & PFERR_FETCH_MASK; uf = pfec & PFERR_USER_MASK; wf = pfec & PFERR_WRITE_MASK; - /* PFEC.RSVD is replaced by ACC_USER_MASK. */ - pte_user = pfec & PFERR_RSVD_MASK; + /* + * PFERR_RSVD_MASK bit is not set if the + * access is subject to PK restrictions. + */ + rsvdf = pfec & PFERR_RSVD_MASK; /* - * Only need to check the access which is not an - * instruction fetch and is to a user page. + * need to check the access which is not an + * instruction fetch and is not a rsvd fault. */ - check_pkey = (!ff && pte_user); + check_pkey = (!ff && !rsvdf); + /* * write access is controlled by PKRU if it is a * user access or CR0.WP = 1. -- 2.17.1
next prev parent reply other threads:[~2020-10-14 2:10 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-14 2:11 [RFC v2 0/7] KVM: PKS Virtualization support Chenyi Qiang 2020-10-14 2:11 ` [RFC v2 1/7] KVM: VMX: Introduce PKS VMCS fields Chenyi Qiang 2020-10-14 2:11 ` [RFC v2 2/7] KVM: VMX: Expose IA32_PKRS MSR Chenyi Qiang 2020-10-14 2:11 ` [RFC v2 3/7] KVM: MMU: Rename the pkru to pkr Chenyi Qiang 2020-10-14 2:11 ` Chenyi Qiang [this message] 2020-10-14 2:11 ` [RFC v2 5/7] KVM: MMU: Add support for PKS emulation Chenyi Qiang 2020-10-14 2:11 ` [RFC v2 6/7] KVM: X86: Expose PKS to guest and userspace Chenyi Qiang 2020-10-14 2:11 ` [RFC v2 7/7] KVM: VMX: Enable PKS for nested VM Chenyi Qiang 2020-10-14 2:11 ` [kvm-unit-tests PATCH] x86: Add tests for PKS Chenyi Qiang
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