From: John Stultz <john.stultz@linaro.org>
To: lkml <linux-kernel@vger.kernel.org>
Cc: John Stultz <john.stultz@linaro.org>,
Felipe Balbi <balbi@kernel.org>,
Tejas Joglekar <tejas.joglekar@synopsys.com>,
Yang Fei <fei.yang@intel.com>,
YongQin Liu <yongqin.liu@linaro.org>,
Andrzej Pietrasiewicz <andrzej.p@collabora.com>,
Thinh Nguyen <thinhn@synopsys.com>,
Jun Li <lijun.kernel@gmail.com>,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-usb@vger.kernel.org
Subject: [PATCH v3 2/2] usb: dwc3: Fix DRD mode change sequence following programming guide
Date: Thu, 22 Oct 2020 03:25:47 +0000 [thread overview]
Message-ID: <20201022032547.92704-2-john.stultz@linaro.org> (raw)
In-Reply-To: <20201022032547.92704-1-john.stultz@linaro.org>
In reviewing the previous patch, Thinh Nguyen pointed out that
the DRD mode change sequence should be like the following when
switching from host -> device according to the programming guide
(for all DRD IPs):
1. Reset controller with GCTL.CoreSoftReset
2. Set GCTL.PrtCapDir(device)
3. Soft reset with DCTL.CSftRst
4. Then follow up with the initializing registers sequence
The current code does:
a. Soft reset with DCTL.CSftRst on driver probe
b. Reset controller with GCTL.CoreSoftReset (added in previous
patch)
c. Set GCTL.PrtCapDir(device)
d. < missing DCTL.CSftRst >
e. Then follow up with initializing registers sequence
So this patch adds the DCTL.CSftRst soft reset that was currently
missing from the dwc3 mode switching.
Cc: Felipe Balbi <balbi@kernel.org>
Cc: Tejas Joglekar <tejas.joglekar@synopsys.com>
Cc: Yang Fei <fei.yang@intel.com>
Cc: YongQin Liu <yongqin.liu@linaro.org>
Cc: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
Cc: Thinh Nguyen <thinhn@synopsys.com>
Cc: Jun Li <lijun.kernel@gmail.com>
Cc: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
---
Feedback would be appreciated. I'm a little worried I should be
conditionalizing the DCTL.CSftRst on DRD mode controllers, but
I'm really not sure what the right thing to do is for non-DRD
mode controllers.
---
drivers/usb/dwc3/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index a2a88284a95b..c87d8add19e4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -40,6 +40,8 @@
#define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */
+static int dwc3_core_soft_reset(struct dwc3 *dwc);
+
/**
* dwc3_get_dr_mode - Validates and sets dr_mode
* @dwc: pointer to our context structure
@@ -177,6 +179,7 @@ static void __dwc3_set_mode(struct work_struct *work)
dwc3_set_prtcap(dwc, dwc->desired_dr_role);
+ dwc3_core_soft_reset(dwc);
spin_unlock_irqrestore(&dwc->lock, flags);
switch (dwc->desired_dr_role) {
--
2.17.1
next prev parent reply other threads:[~2020-10-22 3:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 3:25 [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD John Stultz
2020-10-22 3:25 ` John Stultz [this message]
2021-01-08 1:51 John Stultz
2021-01-08 1:51 ` [PATCH v3 2/2] usb: dwc3: Fix DRD mode change sequence following programming guide John Stultz
2021-03-06 9:00 ` Wesley Cheng
2021-03-06 23:39 ` Thinh Nguyen
2021-03-29 22:17 ` Wesley Cheng
2021-03-30 1:19 ` Thinh Nguyen
2021-03-30 20:17 ` Wesley Cheng
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