From: Biwen Li <biwen.li@oss.nxp.com>
To: shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
leoyang.li@nxp.com, zhiqiang.hou@nxp.com, tglx@linutronix.de,
jason@lakedaemon.net, maz@kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
jiafei.pan@nxp.com, xiaobo.xie@nxp.com,
linux-arm-kernel@lists.infradead.org, Biwen Li <biwen.li@nxp.com>
Subject: [RESEND 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines
Date: Mon, 26 Oct 2020 16:01:18 +0800 [thread overview]
Message-ID: <20201026080127.40499-2-biwen.li@oss.nxp.com> (raw)
In-Reply-To: <20201026080127.40499-1-biwen.li@oss.nxp.com>
From: Biwen Li <biwen.li@nxp.com>
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
---
.../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 27 ++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370f6316..38a6d951ecc5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
@@ -311,6 +311,31 @@
compatible = "fsl,ls1043a-scfg", "syscon";
reg = <0x0 0x1570000 0x0 0x10000>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1570000 0x10000>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 &gic GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 &gic GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0xffffffff 0x0>;
+ };
};
crypto: crypto@1700000 {
--
2.17.1
next prev parent reply other threads:[~2020-10-26 8:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 8:01 [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-10-26 8:01 ` Biwen Li [this message]
2020-10-26 8:01 ` [RESEND 03/11] arm64: dts: ls1046a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` [RESEND 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` [RESEND 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` [RESEND 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` [RESEND 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` [RESEND 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` [RESEND 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
2020-10-26 8:01 ` [RESEND 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
2020-10-26 8:01 ` [RESEND 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-10-26 8:44 ` [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Marc Zyngier
2020-10-26 9:06 ` Rasmus Villemoes
2020-10-26 9:22 ` Marc Zyngier
2020-10-26 15:06 ` Leo Li
2020-10-26 15:42 ` Marc Zyngier
2020-10-27 3:14 ` Biwen Li
2020-10-27 3:25 ` Biwen Li (OSS)
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