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Sat, 31 Oct 2020 02:27:44 -0700 (PDT) From: Ioana Ciornei X-Google-Original-From: Ioana Ciornei Date: Sat, 31 Oct 2020 11:27:43 +0200 To: Dan Murphy Cc: davem@davemloft.net, andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com, robh@kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v3 3/4] dt-bindings: dp83td510: Add binding for DP83TD510 Ethernet PHY Message-ID: <20201031092743.pfqzear3siw5jn3e@skbuf> References: <20201030172950.12767-1-dmurphy@ti.com> <20201030172950.12767-4-dmurphy@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201030172950.12767-4-dmurphy@ti.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 30, 2020 at 12:29:49PM -0500, Dan Murphy wrote: > The DP83TD510 is a 10M single twisted pair Ethernet PHY > > Signed-off-by: Dan Murphy > --- > .../devicetree/bindings/net/ti,dp83td510.yaml | 62 +++++++++++++++++++ > 1 file changed, 62 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/ti,dp83td510.yaml > > diff --git a/Documentation/devicetree/bindings/net/ti,dp83td510.yaml b/Documentation/devicetree/bindings/net/ti,dp83td510.yaml > new file mode 100644 > index 000000000000..aef949c1cfdd > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/ti,dp83td510.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2020 Texas Instruments Incorporated > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/net/ti,dp83td510.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: TI DP83TD510 ethernet PHY > + > +allOf: > + - $ref: "ethernet-controller.yaml#" > + - $ref: "ethernet-phy.yaml#" > + > +maintainers: > + - Dan Murphy > + > +description: | > + The PHY is an twisted pair 10Mbps Ethernet PHY that support MII, RMII and > + RGMII interfaces. > + > + Specifications about the Ethernet PHY can be found at: > + http://www.ti.com/lit/ds/symlink/dp83td510e.pdf > + > +properties: > + reg: > + maxItems: 1 > + > + tx-fifo-depth: > + description: | > + Transmitt FIFO depth for RMII mode. The PHY only exposes 4 nibble > + depths. The valid nibble depths are 4, 5, 6 and 8. > + enum: [ 4, 5, 6, 8 ] > + default: 5 > + > + rx-internal-delay-ps: > + description: | > + Setting this property to a non-zero number sets the RX internal delay > + for the PHY. The internal delay for the PHY is fixed to 30ns relative > + to receive data. > + > + tx-internal-delay-ps: > + description: | > + Setting this property to a non-zero number sets the TX internal delay > + for the PHY. The internal delay for the PHY has a range of -4 to 4ns > + relative to transmit data. > + > +required: > + - reg > + I just got this feedback so I am passing it on. Every dtbinding should have the additionalProperties set to false so that dtbs_check can actually catch if there is a undefined property used. Ioana