From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9F38C388F7 for ; Sat, 31 Oct 2020 18:28:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9E7A420723 for ; Sat, 31 Oct 2020 18:28:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728325AbgJaS2r (ORCPT ); Sat, 31 Oct 2020 14:28:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728240AbgJaS2r (ORCPT ); Sat, 31 Oct 2020 14:28:47 -0400 Received: from leonov.paulk.fr (vpn-0-22.aquilenet.fr [IPv6:2a0c:e300:4:22::]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6906DC0617A6; Sat, 31 Oct 2020 11:28:46 -0700 (PDT) Received: from gagarine.paulk.fr (gagarine [192.168.1.127]) by leonov.paulk.fr (Postfix) with ESMTPS id AE81CC029C; Sat, 31 Oct 2020 19:22:28 +0100 (CET) Received: by gagarine.paulk.fr (Postfix, from userid 114) id 1D94AC1D65; Sat, 31 Oct 2020 19:22:28 +0100 (CET) Received: from localhost.localdomain (unknown [192.168.1.101]) by gagarine.paulk.fr (Postfix) with ESMTP id 8F05EC1D66; Sat, 31 Oct 2020 19:21:54 +0100 (CET) From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Matteo Scordino , Icenowy Zheng , Paul Kocialkowski Subject: [PATCH 2/9] ARM: dts: sun8i-v3: Add UART1 PG pins description Date: Sat, 31 Oct 2020 19:21:30 +0100 Message-Id: <20201031182137.1879521-3-contact@paulk.fr> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201031182137.1879521-1-contact@paulk.fr> References: <20201031182137.1879521-1-contact@paulk.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org UART1 is often exposed through the PG pins (usually for the debug console) on the V3. They are not available on V3s. Describe these pins in device-tree. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-v3.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi index ca4672ed2e02..edf48e0471ad 100644 --- a/arch/arm/boot/dts/sun8i-v3.dtsi +++ b/arch/arm/boot/dts/sun8i-v3.dtsi @@ -24,4 +24,10 @@ external_mdio: mdio@2 { &pio { compatible = "allwinner,sun8i-v3-pinctrl"; + + /omit-if-no-ref/ + uart1_pg_pins: uart1-pg-pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; }; -- 2.28.0