From: Alice Guo <alice.guo@nxp.com>
To: shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, peng.fan@nxp.com
Subject: [PATCH v1 3/4] arm64: dts: imx8m: add nvmem-cell related stuff
Date: Wed, 4 Nov 2020 11:09:58 +0800 [thread overview]
Message-ID: <20201104030959.13264-4-alice.guo@nxp.com> (raw)
In-Reply-To: <20201104030959.13264-1-alice.guo@nxp.com>
Add nvmem-cell related stuff for the soc unique ID.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++
4 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index ec71a5e8a062..b45dfe133ec7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -261,6 +261,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mm_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -475,6 +477,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mm_uid: unique_id@410 {
+ reg = <4 8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 6d3a809a00fd..7418c886fdab 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -245,6 +245,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mn_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -388,6 +390,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mn_uid: unique_id@410 {
+ reg = <4 8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9cd218f5f004..e0f1d5a0dc21 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -222,6 +222,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
+ nvmem-cells = <&imx8mp_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -328,6 +330,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mp_uid: unique_id@420 {
+ reg = <8 8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a3c76bb880db..8fad6730db3d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -291,6 +291,8 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e000000>;
dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>;
+ nvmem-cells = <&imx8mq_uid>;
+ nvmem-cell-names = "soc_unique_id";
bus@30000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
@@ -555,6 +557,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mq_uid: soc_uid@410 {
+ reg = <4 8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
--
2.17.1
next prev parent reply other threads:[~2020-11-04 3:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-04 3:09 [PATCH v1 0/4] change drivers/soc/imx/soc-imx8m.c to use platform driver Alice Guo
2020-11-04 3:09 ` [PATCH v1 1/4] dt-bindings: soc: imx8m: add DT Binding doc for soc unique ID Alice Guo
2020-11-04 8:00 ` Krzysztof Kozlowski
2020-11-04 3:09 ` [PATCH v1 2/4] arm64: dts: imx8m: add compatible string to .dtsi file Alice Guo
2020-11-04 3:09 ` Alice Guo [this message]
2020-11-04 3:09 ` [PATCH v1 4/4] soc: imx8m: change to use platform driver Alice Guo
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