From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA715C00A89 for ; Thu, 5 Nov 2020 09:04:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 785DA20715 for ; Thu, 5 Nov 2020 09:04:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729604AbgKEJEP convert rfc822-to-8bit (ORCPT ); Thu, 5 Nov 2020 04:04:15 -0500 Received: from pegase1.c-s.fr ([93.17.236.30]:52895 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726371AbgKEJEO (ORCPT ); Thu, 5 Nov 2020 04:04:14 -0500 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 4CRcyg3tSqz9vCyj; Thu, 5 Nov 2020 10:04:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id uIyHmrE6a39O; Thu, 5 Nov 2020 10:04:11 +0100 (CET) Received: from vm-hermes.si.c-s.fr (vm-hermes.si.c-s.fr [192.168.25.253]) by pegase1.c-s.fr (Postfix) with ESMTP id 4CRcyg2vq6z9vCyV; Thu, 5 Nov 2020 10:04:11 +0100 (CET) Received: by vm-hermes.si.c-s.fr (Postfix, from userid 33) id 89119D5F; Thu, 5 Nov 2020 10:06:51 +0100 (CET) Received: from 192.168.4.90 ([192.168.4.90]) by messagerie.c-s.fr (Horde Framework) with HTTP; Thu, 05 Nov 2020 10:06:51 +0100 Date: Thu, 05 Nov 2020 10:06:51 +0100 Message-ID: <20201105100651.Horde.jOAklfLApjH2WjmauwW9Gg1@messagerie.c-s.fr> From: Christophe Leroy To: Miquel Raynal Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org Subject: Re: Kernel 5.10-rc1 not mounting NAND flash (Bisected to d7157ff49a5b ("mtd: rawnand: Use the ECC framework user input parsing bits")) References: <20201104183353.Horde.FyqZycHkfr5KHDjPaOEBpQ7@messagerie.c-s.fr> <20201104183859.590f0806@xps13> <20201105084939.72ea6bfd@xps13> In-Reply-To: <20201105084939.72ea6bfd@xps13> User-Agent: Internet Messaging Program (IMP) H5 (6.2.3) Content-Type: text/plain; charset=UTF-8; format=flowed; DelSp=Yes MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Miquel Raynal : > Hi Christophe, > > Christophe Leroy wrote on Wed, 4 Nov 2020 > 19:37:57 +0100: > >> Hi Miquel, >> >> Le 04/11/2020 à 18:38, Miquel Raynal a écrit : >> > Hi Christophe, >> > >> > Christophe Leroy wrote on Wed, 04 Nov >> > 2020 18:33:53 +0100: >> > >> >> Hi Miquel, >> >> >> >> I'm unable to boot 5.10-rc1 on my boards. I get the following error: >> >> >> >> [ 4.125811] nand: device found, Manufacturer ID: 0xad, Chip ID: 0x76 >> >> [ 4.131992] nand: Hynix NAND 64MiB 3,3V 8-bit >> >> [ 4.136173] nand: 64 MiB, SLC, erase size: 16 KiB, page size: >> 512, OOB size: 16 >> >> [ 4.143534] ------------[ cut here ]------------ >> >> [ 4.147934] Unsupported ECC algorithm! >> >> [ 4.152142] WARNING: CPU: 0 PID: 1 at >> drivers/mtd/nand/raw/nand_base.c:5244 >> nand_scan_with_ids+0x1260/0x1640 >> >> ... >> >> [ 4.332052] ---[ end trace e3a36f62cae4ac56 ]--- >> >> [ 4.336882] gpio-nand: probe of c0000000.nand failed with error -22 >> >> >> >> Bisected to commit d7157ff49a5b ("mtd: rawnand: Use the ECC >> framework user input parsing bits") >> >> >> >> My first impression is that with that change, the value set in >> chip->ecc.algo >> >> by gpio_nand_probe() in drivers/mtd/nand/raw/gpio.c gets >> overwritten in rawnand_dt_init() >> >> >> >> The following change fixes the problem, though I'm not sure it >> is the right fix. Can you have a look ? >> >> >> >> diff --git a/drivers/mtd/nand/raw/nand_base.c >> b/drivers/mtd/nand/raw/nand_base.c >> >> index 1f0d542d5923..aa74797cf2da 100644 >> >> --- a/drivers/mtd/nand/raw/nand_base.c >> >> +++ b/drivers/mtd/nand/raw/nand_base.c >> >> @@ -5032,7 +5032,8 @@ static int rawnand_dt_init(struct nand_chip *chip) >> >> chip->ecc.engine_type = nand->ecc.defaults.engine_type; >> >> >> >> chip->ecc.placement = nand->ecc.user_conf.placement; >> >> - chip->ecc.algo = nand->ecc.user_conf.algo; >> >> + if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) >> >> + chip->ecc.algo = nand->ecc.user_conf.algo; >> >> chip->ecc.strength = nand->ecc.user_conf.strength; >> >> chip->ecc.size = nand->ecc.user_conf.step_size; >> >> >> >> --- >> >> >> >> Thanks >> >> Christophe >> > >> > Sorry for introducing this issue, I didn't had the time to send the >> > Fixes PR yet but I think this issue has been solved already. Could >> > you please try with a recent linux-next? >> > >> >> Sorry, same problem with "Linux version 5.10.0-rc2-next-20201104" > > Can you please give this patch a try, please? > > ---8<--- > > Author: Miquel Raynal > Date: Thu Nov 5 08:44:48 2020 +0100 > > mtd: rawnand: gpio: Move the ECC initialization to ->attach_chip() > > While forcing a Hamming software ECC looks clearly wrong, let's just > fix the situation for now and move these lines to the ->attach_chip() > hook which gets executed after the user input parsing and NAND chip > discovery. > > Fixes: d7157ff49a5b ("mtd: rawnand: Use the ECC framework user > input parsing bits") > Signed-off-by: Miquel Raynal > > diff --git a/drivers/mtd/nand/raw/gpio.c b/drivers/mtd/nand/raw/gpio.c > index 3bd847ccc3f3..6feab847f5e0 100644 > --- a/drivers/mtd/nand/raw/gpio.c > +++ b/drivers/mtd/nand/raw/gpio.c > @@ -161,8 +161,15 @@ static int gpio_nand_exec_op(struct nand_chip *chip, > return ret; > } > > +static int gpio_nand_attach_chip(struct nand_chip *chip) > +{ > + chip->ecc.mode = NAND_ECC_SOFT; > + chip->ecc.algo = NAND_ECC_HAMMING; > +} > + > static const struct nand_controller_ops gpio_nand_ops = { > .exec_op = gpio_nand_exec_op, > + .attach_chip = gpio_nand_attach_chip, > }; > > #ifdef CONFIG_OF > @@ -342,8 +349,6 @@ static int gpio_nand_probe(struct platform_device *pdev) > gpiomtd->base.ops = &gpio_nand_ops; > > nand_set_flash_node(chip, pdev->dev.of_node); > - chip->ecc.mode = NAND_ECC_SOFT; > - chip->ecc.algo = NAND_ECC_HAMMING; > chip->options = gpiomtd->plat.options; > chip->controller = &gpiomtd->base; Works with the following: diff --git a/drivers/mtd/nand/raw/gpio.c b/drivers/mtd/nand/raw/gpio.c index 4ec0a1e10867..66d3f1eb788c 100644 --- a/drivers/mtd/nand/raw/gpio.c +++ b/drivers/mtd/nand/raw/gpio.c @@ -161,8 +161,17 @@ static int gpio_nand_exec_op(struct nand_chip *chip, return ret; } +static int gpio_nand_attach_chip(struct nand_chip *chip) +{ + chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; + chip->ecc.algo = NAND_ECC_ALGO_HAMMING; + + return 0; +} + static const struct nand_controller_ops gpio_nand_ops = { .exec_op = gpio_nand_exec_op, + .attach_chip = gpio_nand_attach_chip, }; #ifdef CONFIG_OF @@ -342,8 +351,6 @@ static int gpio_nand_probe(struct platform_device *pdev) gpiomtd->base.ops = &gpio_nand_ops; nand_set_flash_node(chip, pdev->dev.of_node); - chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; - chip->ecc.algo = NAND_ECC_ALGO_HAMMING; chip->options = gpiomtd->plat.options; chip->controller = &gpiomtd->base; --- Christophe