From: Mark Brown <broonie@kernel.org>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: "Cédric Le Goater" <clg@kaod.org>,
robh+dt@kernel.org,
"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
joel@jms.id.au, andrew@aj.id.au, bbrezillon@kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-aspeed@lists.ozlabs.org, linux-spi@vger.kernel.org,
BMC-SW@aspeedtech.com
Subject: Re: [v3 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller driver
Date: Thu, 5 Nov 2020 16:43:12 +0000 [thread overview]
Message-ID: <20201105164312.GE4856@sirena.org.uk> (raw)
In-Reply-To: <20201105161132.37eb3265@collabora.com>
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On Thu, Nov 05, 2020 at 04:11:32PM +0100, Boris Brezillon wrote:
> Cédric Le Goater <clg@kaod.org> wrote:
> > Thanks for this driver. It's much cleaner than the previous and we should
> > try adding support for the AST2500 SoC also. I guess we can keep the old
> > driver for the AST2400 which has a different register layout.
> >
> > On the patchset, I think we should split this patch in three :
> >
> > - basic support
> > - AHB window calculation depending on the flash size
> > - read training support
> I didn't look closely at the implementation, but if the read training
> tries to read a section of the NOR, I'd recommend exposing that feature
> through spi-mem and letting the SPI-NOR framework trigger the training
> instead of doing that at dirmap creation time (remember that spi-mem is
> also used for SPI NANDs which use the dirmap API too, and this training
> is unlikely to work there).
> The SPI-NOR framework could pass a read op template and a reference
> pattern such that all the spi-mem driver has to do is execute the
> template op and compare the output to the reference buffer.
That seems like a good idea.
> > We should avoid magic values when setting registers. This is confusing
> > and defines are much better.
It does depend a bit on documentation though, it's not a hard
requirement.
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next prev parent reply other threads:[~2020-11-05 16:43 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 12:03 [v3 0/4] Porting ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-05 12:03 ` [v3 1/4] dt-bindings: spi: Add binding file for ASPEED FMC/SPI memory controller Chin-Ting Kuo
2020-11-05 22:39 ` Rob Herring
2020-11-06 9:11 ` Chin-Ting Kuo
2020-11-05 12:03 ` [v3 2/4] ARM: dts: aspeed: ast2600: Update FMC/SPI controller setting for spi-aspeed.c Chin-Ting Kuo
2020-11-05 12:03 ` [v3 3/4] ARM: dts: aspeed: ast2600-evb: Adjust SPI flash configuration Chin-Ting Kuo
2020-11-05 12:03 ` [v3 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-05 14:09 ` Cédric Le Goater
2020-11-05 15:11 ` Boris Brezillon
2020-11-05 16:43 ` Mark Brown [this message]
2020-11-06 9:01 ` Chin-Ting Kuo
2020-11-06 8:58 ` Chin-Ting Kuo
2020-11-06 9:05 ` Boris Brezillon
2020-11-06 10:21 ` Chin-Ting Kuo
2020-11-06 11:30 ` Boris Brezillon
2020-11-06 18:27 ` Chin-Ting Kuo
2020-11-11 5:44 ` Vignesh Raghavendra
2020-11-13 7:30 ` Chin-Ting Kuo
2020-11-06 7:38 ` Chin-Ting Kuo
2020-12-01 13:57 ` [v3 0/4] Porting " Mark Brown
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