From: Shiju Jose <shiju.jose@huawei.com>
To: <linux-edac@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <james.morse@arm.com>,
<bp@alien8.de>, <tony.luck@intel.com>, <rjw@rjwysocki.net>,
<lenb@kernel.org>, <rrichter@marvell.com>
Cc: <linuxarm@huawei.com>, <jonathan.cameron@huawei.com>,
<shiju.jose@huawei.com>
Subject: [RFC PATCH 0/4] EDAC/ghes: Add EDAC device for recording the CPU error count
Date: Thu, 5 Nov 2020 17:42:29 +0000 [thread overview]
Message-ID: <20201105174233.1146-1-shiju.jose@huawei.com> (raw)
For the firmware-first error handling on ARM64 hardware platforms,
CPU cache corrected error count is not recorded.
Create an CPU EDAC device and device blocks for the CPU caches
for this purpose. The EDAC device blocks are created based on the
CPU caches information represented in the ACPI PPTT.
User-space application could monitor the recorded corrected error
count for the early fault detection.
Jonathan Cameron (1):
ACPI: PPTT: Fix for a high level cache node detected in the low level
Shiju Jose (3):
ACPI: PPTT: Add function acpi_find_cache_info
EDAC/ghes: Add EDAC device for the CPU caches
ACPI / APEI: Add reporting ARM64 CPU cache corrected error count
drivers/acpi/apei/ghes.c | 79 +++++++++++++++++++++-
drivers/acpi/pptt.c | 123 +++++++++++++++++++++++++++++++++-
drivers/edac/Kconfig | 10 +++
drivers/edac/ghes_edac.c | 135 ++++++++++++++++++++++++++++++++++++++
include/acpi/ghes.h | 27 ++++++++
include/linux/cacheinfo.h | 12 ++++
include/linux/cper.h | 4 ++
7 files changed, 386 insertions(+), 4 deletions(-)
--
2.17.1
next reply other threads:[~2020-11-05 18:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 17:42 Shiju Jose [this message]
2020-11-05 17:42 ` [RFC PATCH 1/4] ACPI: PPTT: Fix for a high level cache node detected in the low level Shiju Jose
2020-11-06 19:33 ` James Morse
2020-11-09 12:27 ` Jonathan Cameron
2020-11-09 15:59 ` Shiju Jose
2020-11-05 17:42 ` [RFC PATCH 2/4] ACPI: PPTT: Add function acpi_find_cache_info Shiju Jose
2020-11-05 17:42 ` [RFC PATCH 3/4] EDAC/ghes: Add EDAC device for the CPU caches Shiju Jose
2020-11-05 17:42 ` [RFC PATCH 4/4] ACPI / APEI: Add reporting ARM64 CPU cache corrected error count Shiju Jose
2020-11-06 19:33 ` [RFC PATCH 0/4] EDAC/ghes: Add EDAC device for recording the CPU " James Morse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201105174233.1146-1-shiju.jose@huawei.com \
--to=shiju.jose@huawei.com \
--cc=bp@alien8.de \
--cc=james.morse@arm.com \
--cc=jonathan.cameron@huawei.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=rjw@rjwysocki.net \
--cc=rrichter@marvell.com \
--cc=tony.luck@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).