From: Alex Elder <elder@linaro.org>
To: davem@davemloft.net, kuba@kernel.org
Cc: evgreen@chromium.org, subashab@codeaurora.org,
cpratapa@codeaurora.org, bjorn.andersson@linaro.org,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH net-next 07/13] net: ipa: only enable GSI channel control IRQs when needed
Date: Thu, 5 Nov 2020 12:14:01 -0600 [thread overview]
Message-ID: <20201105181407.8006-8-elder@linaro.org> (raw)
In-Reply-To: <20201105181407.8006-1-elder@linaro.org>
A GSI channel causes a channel control interrupt to fire whenever
its state changes (between NOT_ALLOCATED, ALLOCATED, STARTED, etc.).
We do not support inter-EE channel commands (initiated by other EEs),
so no channel should ever change state except when we request it to.
Currently, we permit *all* channels to generate channel control
interrupts--even those that are never used. And we enable channel
control interrupts essentially at all times, from setup to teardown.
Instead, disable all channel control interrupts initially in
gsi_irq_setup(), and only enable the channel control interrupt
type for the duration of a channel command. When doing so, only
allow the channel being operated upon to cause the interrupt to
fire.
Because a channel's interrupt is now enabled only when needed (one
channel at a time), there is no longer any need to zero the channel
mask in gsi_irq_disable().
Add new gsi_irq_type_enable() and gsi_irq_type_disable() as helper
functions to control whether a given GSI interrupt type is enabled.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/gsi.c | 39 ++++++++++++++++++++++++++++++++-------
1 file changed, 32 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
index f76b5a1e1f8d5..4fc72dfe1e9b0 100644
--- a/drivers/net/ipa/gsi.c
+++ b/drivers/net/ipa/gsi.c
@@ -237,11 +237,25 @@ static void gsi_irq_type_update(struct gsi *gsi)
gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET);
}
+static void gsi_irq_type_enable(struct gsi *gsi, enum gsi_irq_type_id type_id)
+{
+ gsi->type_enabled_bitmap |= BIT(type_id);
+ gsi_irq_type_update(gsi);
+}
+
+static void gsi_irq_type_disable(struct gsi *gsi, enum gsi_irq_type_id type_id)
+{
+ gsi->type_enabled_bitmap &= ~BIT(type_id);
+ gsi_irq_type_update(gsi);
+}
+
/* Turn off all GSI interrupts initially */
static void gsi_irq_setup(struct gsi *gsi)
{
gsi->type_enabled_bitmap = 0;
gsi_irq_type_update(gsi);
+
+ iowrite32(0, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET);
}
/* Turn off all GSI interrupts when we're all done */
@@ -274,10 +288,6 @@ static void gsi_irq_enable(struct gsi *gsi)
{
u32 val;
- val = GENMASK(gsi->channel_count - 1, 0);
- iowrite32(val, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET);
- gsi->type_enabled_bitmap |= BIT(GSI_CH_CTRL);
-
val = GENMASK(gsi->evt_ring_count - 1, 0);
iowrite32(val, gsi->virt + GSI_CNTXT_SRC_EV_CH_IRQ_MSK_OFFSET);
gsi->type_enabled_bitmap |= BIT(GSI_EV_CTRL);
@@ -311,7 +321,6 @@ static void gsi_irq_disable(struct gsi *gsi)
iowrite32(0, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET);
iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
iowrite32(0, gsi->virt + GSI_CNTXT_SRC_EV_CH_IRQ_MSK_OFFSET);
- iowrite32(0, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET);
}
/* Return the virtual address associated with a ring index */
@@ -461,13 +470,29 @@ gsi_channel_command(struct gsi_channel *channel, enum gsi_ch_cmd_opcode opcode)
u32 channel_id = gsi_channel_id(channel);
struct gsi *gsi = channel->gsi;
struct device *dev = gsi->dev;
+ bool success;
u32 val;
+ /* We only perform one channel command at a time, and channel
+ * control interrupts should only occur when such a command is
+ * issued here. So we only permit *this* channel to trigger
+ * an interrupt and only enable the channel control IRQ type
+ * when we expect it to occur.
+ */
+ val = BIT(channel_id);
+ iowrite32(val, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET);
+ gsi_irq_type_enable(gsi, GSI_CH_CTRL);
+
val = u32_encode_bits(channel_id, CH_CHID_FMASK);
val |= u32_encode_bits(opcode, CH_OPCODE_FMASK);
+ success = gsi_command(gsi, GSI_CH_CMD_OFFSET, val, completion);
- if (gsi_command(gsi, GSI_CH_CMD_OFFSET, val, completion))
- return 0; /* Success! */
+ /* Disable the interrupt again */
+ gsi_irq_type_disable(gsi, GSI_CH_CTRL);
+ iowrite32(0, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET);
+
+ if (success)
+ return 0;
dev_err(dev, "GSI command %u for channel %u timed out, state %u\n",
opcode, channel_id, gsi_channel_state(channel));
--
2.20.1
next prev parent reply other threads:[~2020-11-05 18:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 18:13 [PATCH net-next 00/13] net: ipa: constrain GSI interrupts Alex Elder
2020-11-05 18:13 ` [PATCH net-next 01/13] net: ipa: refer to IPA versions, not GSI Alex Elder
2020-11-05 18:13 ` [PATCH net-next 02/13] net: ipa: request GSI IRQ later Alex Elder
2020-11-05 18:13 ` [PATCH net-next 03/13] net: ipa: rename gsi->event_enable_bitmap Alex Elder
2020-11-05 18:13 ` [PATCH net-next 04/13] net: ipa: define GSI interrupt types with an enum Alex Elder
2020-11-05 18:13 ` [PATCH net-next 05/13] net: ipa: disable all GSI interrupt types initially Alex Elder
2020-11-05 18:14 ` [PATCH net-next 06/13] net: ipa: cache last-saved GSI IRQ enabled type Alex Elder
2020-11-05 18:14 ` Alex Elder [this message]
2020-11-05 18:14 ` [PATCH net-next 08/13] net: ipa: only enable GSI event control IRQs when needed Alex Elder
2020-11-05 18:14 ` [PATCH net-next 09/13] net: ipa: only enable generic command completion IRQ " Alex Elder
2020-11-05 18:14 ` [PATCH net-next 10/13] net: ipa: only enable GSI IEOB IRQs " Alex Elder
2020-11-05 18:14 ` [PATCH net-next 11/13] net: ipa: explicitly disallow inter-EE interrupts Alex Elder
2020-11-05 18:14 ` [PATCH net-next 12/13] net: ipa: only enable GSI general IRQs when needed Alex Elder
2020-11-05 18:14 ` [PATCH net-next 13/13] net: ipa: pass a value to gsi_irq_type_update() Alex Elder
2020-11-07 23:50 ` [PATCH net-next 00/13] net: ipa: constrain GSI interrupts patchwork-bot+netdevbpf
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