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From: Coiby Xu <coiby.xu@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>,
	linux-gpio@vger.kernel.org, Hans de Goede <hdegoede@redhat.com>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter
Date: Fri,  6 Nov 2020 07:19:09 +0800	[thread overview]
Message-ID: <20201105231912.69527-2-coiby.xu@gmail.com> (raw)
In-Reply-To: <20201105231912.69527-1-coiby.xu@gmail.com>

The correct way to disable debounce filter is to clear bit 5 and 6
of the register.

Cc: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/linux-gpio/df2c008b-e7b5-4fdd-42ea-4d1c62b52139@redhat.com/
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
---
 drivers/pinctrl/pinctrl-amd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 9a760f5cd7ed..d6b2b4bd337c 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -166,14 +166,14 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
 			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
 			pin_reg |= BIT(DB_TMR_LARGE_OFF);
 		} else {
-			pin_reg &= ~DB_CNTRl_MASK;
+			pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 			ret = -EINVAL;
 		}
 	} else {
 		pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
 		pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
 		pin_reg &= ~DB_TMR_OUT_MASK;
-		pin_reg &= ~DB_CNTRl_MASK;
+		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 	}
 	writel(pin_reg, gpio_dev->base + offset * 4);
 	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
-- 
2.28.0


       reply	other threads:[~2020-11-05 23:19 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20201105231912.69527-1-coiby.xu@gmail.com>
2020-11-05 23:19 ` Coiby Xu [this message]
2020-11-09 13:50   ` [PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter Hans de Goede
2020-11-10 13:18   ` Linus Walleij
2020-11-05 23:19 ` [PATCH v3 2/4] pinctrl: amd: use higher precision for 512 RtcClk Coiby Xu
2020-11-09 13:50   ` Hans de Goede
2020-11-10 13:19   ` Linus Walleij
2020-11-05 23:19 ` [PATCH v3 3/4] pinctrl: amd: print debounce filter info in debugfs Coiby Xu
2020-11-10 13:21   ` Linus Walleij
2020-11-05 23:19 ` [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting Coiby Xu
2020-11-09 13:52   ` Hans de Goede
2020-11-10  8:26     ` Coiby Xu
2020-11-10  8:35       ` Hans de Goede
2020-11-10 13:23   ` Linus Walleij
2020-11-10 13:57     ` Andy Shevchenko

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