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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org,
	coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 19/26] coresight: etm4x: Detect access early on the target CPU
Date: Fri, 6 Nov 2020 13:34:38 -0700	[thread overview]
Message-ID: <20201106203438.GB3299843@xps15> (raw)
In-Reply-To: <20201028220945.3826358-21-suzuki.poulose@arm.com>

On Wed, Oct 28, 2020 at 10:09:38PM +0000, Suzuki K Poulose wrote:
> In preparation to detect the support for system instruction
> support, move the detection of the device access to the target
> CPU.
> 
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
>  .../coresight/coresight-etm4x-core.c          | 45 ++++++++++++++++---
>  1 file changed, 40 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index f038bb10bc78..308674ab746c 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -56,6 +56,11 @@ static u64 etm4_get_access_type(struct etmv4_config *config);
>  
>  static enum cpuhp_state hp_online;
>  
> +struct etm_init_arg {

s/etm_init_arg/etm4_init_arg

> +	struct etmv4_drvdata	*drvdata;
> +	struct csdev_access	*csa;
> +};
> +
>  u64 etm4x_sysreg_read(struct csdev_access *csa,
>  		      u32 offset,
>  		      bool _relaxed,
> @@ -669,6 +674,22 @@ static const struct coresight_ops etm4_cs_ops = {
>  	.source_ops	= &etm4_source_ops,
>  };
>  
> +static bool etm_init_iomem_access(struct etmv4_drvdata *drvdata,
> +				  struct csdev_access *csa)
> +{
> +	*csa = CSDEV_ACCESS_IOMEM(drvdata->base);
> +	return true;
> +}
> +
> +static bool etm_init_csdev_access(struct etmv4_drvdata *drvdata,
> +				  struct csdev_access *csa)
> +{
> +	if (drvdata->base)
> +		return etm_init_iomem_access(drvdata, csa);
> +
> +	return false;
> +}

Returning a boolean rather than an int for the above two functions seems odd to
me.

> +
>  static void etm4_init_arch_data(void *info)
>  {
>  	u32 etmidr0;
> @@ -677,11 +698,22 @@ static void etm4_init_arch_data(void *info)
>  	u32 etmidr3;
>  	u32 etmidr4;
>  	u32 etmidr5;
> -	struct etmv4_drvdata *drvdata = info;
> -	struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base);
> -	struct csdev_access *csa = &tmp_csa;
> +	struct etm_init_arg *init_arg = info;
> +	struct etmv4_drvdata *drvdata;
> +	struct csdev_access *csa;
>  	int i;
>  
> +	drvdata = init_arg->drvdata;
> +	csa = init_arg->csa;
> +
> +	/*
> +	 * If we are unable to detect the access mechanism,
> +	 * or unable to detect the trace unit type, fail
> +	 * early.
> +	 */
> +	if (!etm_init_csdev_access(drvdata, csa))
> +		return;
> +
>  	/* Make sure all registers are accessible */
>  	etm4_os_unlock_csa(drvdata, csa);
>  	etm4_cs_unlock(drvdata, csa);
> @@ -1524,6 +1556,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  	struct etmv4_drvdata *drvdata;
>  	struct resource *res = &adev->res;
>  	struct coresight_desc desc = { 0 };
> +	struct etm_init_arg init_arg = { 0 };
>  
>  	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
>  	if (!drvdata)
> @@ -1551,7 +1584,6 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  		return PTR_ERR(base);
>  
>  	drvdata->base = base;
> -	desc.access = CSDEV_ACCESS_IOMEM(base);
>  
>  	spin_lock_init(&drvdata->spinlock);
>  
> @@ -1563,8 +1595,11 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
>  	if (!desc.name)
>  		return -ENOMEM;
>  
> +	init_arg.drvdata = drvdata;
> +	init_arg.csa = &desc.access;
> +
>  	if (smp_call_function_single(drvdata->cpu,
> -				etm4_init_arch_data,  drvdata, 1))
> +				etm4_init_arch_data,  &init_arg, 1))
>  		dev_err(dev, "ETM arch init failed\n");
>  
>  	if (etm4_arch_supported(drvdata->arch) == false)
> -- 
> 2.24.1
> 

  reply	other threads:[~2020-11-06 20:34 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-28 22:09 [PATCH v3 00/26] coresight: Support for ETM system instructions Suzuki K Poulose
2020-10-28 22:09 ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 01/26] coresight: etm4x: Fix accesses to TRCVMIDCTLR1 Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 02/26] coresight: etm4x: Fix accesses to TRCCIDCTLR1 Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 03/26] coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2 Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 04/26] coresight: etm4x: Fix accesses to TRCPROCSELR Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 05/26] coresight: etm4x: Handle TRCVIPCSSCTLR accesses Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 06/26] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose
2020-11-02 21:46   ` Mathieu Poirier
2020-11-02 22:04     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 07/26] coresight: Introduce device access abstraction Suzuki K Poulose
2020-11-03 17:14   ` Mathieu Poirier
2020-11-03 17:25     ` Mathieu Poirier
2020-11-04 10:07       ` Suzuki K Poulose
2020-11-09 21:00   ` Mathieu Poirier
2020-11-10  9:24     ` Suzuki K Poulose
2020-11-10 17:02       ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 08/26] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose
2020-11-03 18:03   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 09/26] coresight: Convert coresight_timeout to use " Suzuki K Poulose
2020-11-03 18:03   ` Mathieu Poirier
2020-11-04 10:42     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 10/26] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose
2020-11-03 18:36   ` Mathieu Poirier
2020-11-04 10:54     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 11/26] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 12/26] coresight: etm4x: Convert all register accesses Suzuki K Poulose
2020-11-03 18:53   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 13/26] coresight: etm4x: Add commentary on the registers Suzuki K Poulose
2020-11-03 19:03   ` Mathieu Poirier
2020-11-03 19:04   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 14/26] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose
2020-10-29 15:26   ` Suzuki K Poulose
2020-11-05 20:52   ` Mathieu Poirier
2020-11-05 22:47     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 15/26] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 16/26] coresight: etm4x: Check for Software Lock Suzuki K Poulose
2020-11-05 21:50   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 17/26] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose
2020-11-05 21:55   ` Mathieu Poirier
2020-11-09  9:40     ` Suzuki K Poulose
2020-11-09 17:42       ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 18/26] coresight: etm4x: Clean up " Suzuki K Poulose
2020-11-06 18:52   ` Mathieu Poirier
2020-11-09  9:44     ` Suzuki K Poulose
2020-11-10 23:15     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 19/26] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose
2020-11-06 20:34   ` Mathieu Poirier [this message]
2020-11-09  9:48     ` Suzuki K Poulose
2020-11-09 17:48       ` Mathieu Poirier
2020-11-06 20:46   ` Mathieu Poirier
2020-11-10 10:47     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 20/26] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose
2020-11-06 21:11   ` Mathieu Poirier
2020-11-09  9:51     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 21/26] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose
2020-11-06 21:42   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 22/26] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose
2020-11-09 18:32   ` Mathieu Poirier
2020-11-10 10:11     ` Suzuki K Poulose
2020-11-10 11:40       ` John Horley
2020-11-10 17:35       ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 23/26] coresight: etm4x: Detect system instructions support Suzuki K Poulose
2020-11-09 20:22   ` Mathieu Poirier
2020-11-10  9:31     ` Suzuki K Poulose
2020-11-10 17:33       ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 24/26] coresight: etm4x: Refactor probing routine Suzuki K Poulose
2020-11-09 20:43   ` Mathieu Poirier
2020-10-28 22:09 ` [PATCH v3 25/26] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose
2020-11-09 20:46   ` Mathieu Poirier
2020-11-10 10:50     ` Suzuki K Poulose
2020-10-28 22:09 ` [PATCH v3 26/26] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose
2020-11-02 15:31   ` Rob Herring
2020-11-09 20:50   ` Mathieu Poirier
2020-11-10 10:51     ` Suzuki K Poulose
2020-10-29  7:53 ` [PATCH v3 00/26] coresight: Support for ETM system instructions Mike Leach
2020-10-29 15:45   ` Suzuki K Poulose

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