From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18961C63697 for ; Sat, 14 Nov 2020 16:22:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D2B6822409 for ; Sat, 14 Nov 2020 16:22:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727164AbgKNQWC (ORCPT ); Sat, 14 Nov 2020 11:22:02 -0500 Received: from verein.lst.de ([213.95.11.211]:50548 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726716AbgKNQWB (ORCPT ); Sat, 14 Nov 2020 11:22:01 -0500 Received: by verein.lst.de (Postfix, from userid 2407) id B112867373; Sat, 14 Nov 2020 17:21:59 +0100 (CET) Date: Sat, 14 Nov 2020 17:21:59 +0100 From: Christoph Hellwig To: Jonathan Marek Cc: freedreno@lists.freedesktop.org, hch@lst.de, Rob Clark , Sean Paul , David Airlie , Daniel Vetter , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DRM DRIVER FOR MSM ADRENO GPU" , open list Subject: Re: [RESEND PATCH v2 3/5] drm/msm: call dma_direct_bypass() Message-ID: <20201114162159.GB24411@lst.de> References: <20201114151717.5369-1-jonathan@marek.ca> <20201114151717.5369-4-jonathan@marek.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201114151717.5369-4-jonathan@marek.ca> User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Nov 14, 2020 at 10:17:11AM -0500, Jonathan Marek wrote: > Always use direct dma ops and no swiotlb. > > Note: arm-smmu-qcom already avoids creating iommu dma ops, but not > everything uses arm-smmu-qcom and this also sets the dma mask. > > Signed-off-by: Jonathan Marek > --- > drivers/gpu/drm/msm/Kconfig | 1 + > drivers/gpu/drm/msm/msm_drv.c | 8 +++++--- > 2 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig > index e5816b498494..07c50405970a 100644 > --- a/drivers/gpu/drm/msm/Kconfig > +++ b/drivers/gpu/drm/msm/Kconfig > @@ -20,6 +20,7 @@ config DRM_MSM > select SND_SOC_HDMI_CODEC if SND_SOC > select SYNC_FILE > select PM_OPP > + select DMA_OPS_BYPASS > help > DRM/KMS driver for MSM/snapdragon. > > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c > index 49685571dc0e..bae48afca82e 100644 > --- a/drivers/gpu/drm/msm/msm_drv.c > +++ b/drivers/gpu/drm/msm/msm_drv.c > @@ -6,6 +6,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -1288,10 +1289,11 @@ static int msm_pdev_probe(struct platform_device *pdev) > if (ret) > goto fail; > > - /* on all devices that I am aware of, iommu's which can map > - * any address the cpu can see are used: > + /* always use direct dma ops and no swiotlb Again, and implementation detail. Comments should not explain details obvious from the code (especially layers away) but the intent.