From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAAC0C6369E for ; Tue, 17 Nov 2020 02:39:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7FF6A2469D for ; Tue, 17 Nov 2020 02:39:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726815AbgKQCim (ORCPT ); Mon, 16 Nov 2020 21:38:42 -0500 Received: from mga04.intel.com ([192.55.52.120]:52551 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726085AbgKQCil (ORCPT ); Mon, 16 Nov 2020 21:38:41 -0500 IronPort-SDR: 4qKMfQ/tqs1pkWvsp01DxdJE3Aj5B/opG6VPxLc6+EB7RzMbbKKLGe3ApiewFN0Tbn2SpF5EDG UB9kcsv7fI8Q== X-IronPort-AV: E=McAfee;i="6000,8403,9807"; a="168274031" X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="168274031" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2020 18:38:37 -0800 IronPort-SDR: 6JJ6MB+A92tqTnNPId0FFfP8GJ/OuDGLot0rTr/VBS3xpWYX7fD4oS+UgHXgabc12SrhckMKoa dxX6hjQlzseg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="358705999" Received: from jsia-hp-z620-workstation.png.intel.com ([10.221.118.135]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2020 18:38:35 -0800 From: Sia Jee Heng To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com, robh+dt@kernel.org Cc: andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Date: Tue, 17 Nov 2020 10:22:00 +0800 Message-Id: <20201117022215.2461-1-jee.heng.sia@intel.com> X-Mailer: git-send-email 2.18.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The below patch series are to support AxiDMA running on Intel KeemBay SoC. The base driver is dw-axi-dmac. This driver only support DMA memory copy transfers. Code refactoring is needed so that additional features can be supported. The features added in this patch series are: - Replacing Linked List with virtual descriptor management. - Remove unrelated hw desc stuff from dma memory pool. - Manage dma memory pool alloc/destroy based on channel activity. - Support dmaengine device_sync() callback. - Support dmaengine device_config(). - Support dmaengine device_prep_slave_sg(). - Support dmaengine device_prep_dma_cyclic(). - Support of_dma_controller_register(). - Support burst residue granularity. - Support Intel KeemBay AxiDMA registers. - Support Intel KeemBay AxiDMA device handshake. - Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation. - Add constraint to Max segment size. This patch series are tested on Intel KeemBay platform. v4: - Fixed bot found errors running make_dt_binding_check. - Added minItems: 1 to the YAML schemas DT binding. - Updated "reg" field to the YAML schemas DT binding. v3: - Added additionalProperties: false to the YAML schemas DT binding. - Reordered patch sequence for patch 10th, 11th and 12th so that DT binding come first, follow by adding Intel KeemBay SoC registers and update .compatible field. - Checked txstate NULL condition. - Created helper function dw_axi_dma_set_hw_desc() to handle common code. v2: - Rebased to v5.10-rc1 kernel. - Added support for dmaengine device_config(). - Added support for dmaengine device_prep_slave_sg(). - Added support for dmaengine device_prep_dma_cyclic(). - Added support for of_dma_controller_register(). - Added support for burst residue granularity. - Added support for Intel KeemBay AxiDMA registers. - Added support for Intel KeemBay AxiDMA device handshake. - Added support for Intel KeemBay AxiDMA BYTE and HALFWORD device operation. - Added constraint to Max segment size. v1: - Initial version. Patch on top of dw-axi-dma driver. This version improve the descriptor management by replacing Linked List Item (LLI) with virtual descriptor management, only allocate hardware LLI memories from DMA memory pool, manage DMA memory pool alloc/destroy based on channel activity and to support device_sync callback. Sia Jee Heng (15): dt-bindings: dma: Add YAML schemas for dw-axi-dmac dmaengine: dw-axi-dmac: simplify descriptor management dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() dmaengine: dw-axi-dmac: Add device_synchronize() callback dmaengine: dw-axi-dmac: Add device_config operation dmaengine: dw-axi-dmac: Support device_prep_slave_sg dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() dmaengine: dw-axi-dmac: Support of_dma_controller_register() dmaengine: dw-axi-dmac: Support burst residue granularity dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers dmaengine: dw-axi-dmac: Set constraint to the Max segment size .../bindings/dma/snps,dw-axi-dmac.txt | 39 -- .../bindings/dma/snps,dw-axi-dmac.yaml | 153 +++++ .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 636 +++++++++++++++--- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 33 +- 4 files changed, 727 insertions(+), 134 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml base-commit: 9c87c9f41245baa3fc4716cf39141439cf405b01 -- 2.18.0