From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>,
<robh+dt@kernel.org>
Cc: <dan.j.williams@intel.com>, <t-kristo@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<dmaengine@vger.kernel.org>, <vigneshr@ti.com>,
<grygorii.strashko@ti.com>
Subject: [PATCH v2 03/19] dmaengine: ti: k3-udma: Add support for second resource range from sysfw
Date: Tue, 17 Nov 2020 12:56:40 +0200 [thread overview]
Message-ID: <20201117105656.5236-4-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20201117105656.5236-1-peter.ujfalusi@ti.com>
Resource allocation via sysfw can use up to two ranges per resource subtype
to support more complex resource assignment, mainly for DMA channels.
Take the second range also into consideration when setting up the maps for
available resources.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
drivers/dma/ti/k3-udma.c | 55 ++++++++++++++++++++++------------------
1 file changed, 31 insertions(+), 24 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index eee43757e774..b89afa602532 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -3174,12 +3174,22 @@ static int udma_get_mmrs(struct platform_device *pdev, struct udma_dev *ud)
return 0;
}
+static void udma_mark_resource_ranges(struct udma_dev *ud, unsigned long *map,
+ struct ti_sci_resource_desc *rm_desc,
+ char *name)
+{
+ bitmap_clear(map, rm_desc->start, rm_desc->num);
+ bitmap_clear(map, rm_desc->start_sec, rm_desc->num_sec);
+ dev_dbg(ud->dev, "ti_sci resource range for %s: %d:%d | %d:%d\n", name,
+ rm_desc->start, rm_desc->num, rm_desc->start_sec,
+ rm_desc->num_sec);
+}
+
static int udma_setup_resources(struct udma_dev *ud)
{
struct device *dev = ud->dev;
int ch_count, ret, i, j;
u32 cap2, cap3;
- struct ti_sci_resource_desc *rm_desc;
struct ti_sci_resource *rm_res, irq_res;
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
static const char * const range_names[] = { "ti,sci-rm-range-tchan",
@@ -3264,13 +3274,9 @@ static int udma_setup_resources(struct udma_dev *ud)
bitmap_zero(ud->tchan_map, ud->tchan_cnt);
} else {
bitmap_fill(ud->tchan_map, ud->tchan_cnt);
- for (i = 0; i < rm_res->sets; i++) {
- rm_desc = &rm_res->desc[i];
- bitmap_clear(ud->tchan_map, rm_desc->start,
- rm_desc->num);
- dev_dbg(dev, "ti-sci-res: tchan: %d:%d\n",
- rm_desc->start, rm_desc->num);
- }
+ for (i = 0; i < rm_res->sets; i++)
+ udma_mark_resource_ranges(ud, ud->tchan_map,
+ &rm_res->desc[i], "tchan");
}
irq_res.sets = rm_res->sets;
@@ -3280,13 +3286,9 @@ static int udma_setup_resources(struct udma_dev *ud)
bitmap_zero(ud->rchan_map, ud->rchan_cnt);
} else {
bitmap_fill(ud->rchan_map, ud->rchan_cnt);
- for (i = 0; i < rm_res->sets; i++) {
- rm_desc = &rm_res->desc[i];
- bitmap_clear(ud->rchan_map, rm_desc->start,
- rm_desc->num);
- dev_dbg(dev, "ti-sci-res: rchan: %d:%d\n",
- rm_desc->start, rm_desc->num);
- }
+ for (i = 0; i < rm_res->sets; i++)
+ udma_mark_resource_ranges(ud, ud->rchan_map,
+ &rm_res->desc[i], "rchan");
}
irq_res.sets += rm_res->sets;
@@ -3295,12 +3297,21 @@ static int udma_setup_resources(struct udma_dev *ud)
for (i = 0; i < rm_res->sets; i++) {
irq_res.desc[i].start = rm_res->desc[i].start;
irq_res.desc[i].num = rm_res->desc[i].num;
+ irq_res.desc[i].start_sec = rm_res->desc[i].start_sec;
+ irq_res.desc[i].num_sec = rm_res->desc[i].num_sec;
}
rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN];
for (j = 0; j < rm_res->sets; j++, i++) {
- irq_res.desc[i].start = rm_res->desc[j].start +
+ if (rm_res->desc[j].num) {
+ irq_res.desc[i].start = rm_res->desc[j].start +
ud->soc_data->rchan_oes_offset;
- irq_res.desc[i].num = rm_res->desc[j].num;
+ irq_res.desc[i].num = rm_res->desc[j].num;
+ }
+ if (rm_res->desc[j].num_sec) {
+ irq_res.desc[i].start_sec = rm_res->desc[j].start_sec +
+ ud->soc_data->rchan_oes_offset;
+ irq_res.desc[i].num_sec = rm_res->desc[j].num_sec;
+ }
}
ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, &irq_res);
kfree(irq_res.desc);
@@ -3316,13 +3327,9 @@ static int udma_setup_resources(struct udma_dev *ud)
bitmap_clear(ud->rflow_gp_map, ud->rchan_cnt,
ud->rflow_cnt - ud->rchan_cnt);
} else {
- for (i = 0; i < rm_res->sets; i++) {
- rm_desc = &rm_res->desc[i];
- bitmap_clear(ud->rflow_gp_map, rm_desc->start,
- rm_desc->num);
- dev_dbg(dev, "ti-sci-res: rflow: %d:%d\n",
- rm_desc->start, rm_desc->num);
- }
+ for (i = 0; i < rm_res->sets; i++)
+ udma_mark_resource_ranges(ud, ud->rflow_gp_map,
+ &rm_res->desc[i], "gp-rflow");
}
ch_count -= bitmap_weight(ud->tchan_map, ud->tchan_cnt);
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2020-11-17 10:56 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 10:56 [PATCH v2 00/19] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 01/19] dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0 Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 02/19] dmaengine: ti: k3-udma: Wait for peer teardown completion if supported Peter Ujfalusi
2020-11-17 10:56 ` Peter Ujfalusi [this message]
2020-11-17 10:56 ` [PATCH v2 04/19] dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 05/19] dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 06/19] dmaengine: of-dma: Add support for optional router configuration callback Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 07/19] dmaengine: Add support for per channel coherency handling Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 08/19] dmaengine: doc: client: Update for dmaengine_get_dma_device() usage Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 09/19] dmaengine: dmatest: Use dmaengine_get_dma_device Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 10/19] dt-bindings: dma: ti: Add document for K3 BCDMA Peter Ujfalusi
2020-12-07 19:42 ` Rob Herring
2020-12-08 6:40 ` Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 11/19] dt-bindings: dma: ti: Add document for K3 PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 12/19] dmaengine: ti: k3-psil: Extend psil_endpoint_config " Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 13/19] dmaengine: ti: k3-psil: Add initial map for AM64 Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 14/19] dmaengine: ti: Add support for k3 event routers Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 15/19] soc: ti: k3-ringacc: add AM64 DMA rings support Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 16/19] dmaengine: ti: k3-udma: Initial support for K3 BCDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 17/19] dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 18/19] dmaengine: ti: k3-udma: Initial support for K3 PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 19/19] dmaengine: ti: k3-udma-glue: Add " Peter Ujfalusi
2020-11-27 7:18 ` [PATCH] dmaengine: ti: k3-udma-glue: Add new class for glue channels Peter Ujfalusi
2020-11-24 17:08 ` [PATCH v2 00/19] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Vinod Koul
2020-12-07 7:29 ` Peter Ujfalusi
2020-12-07 15:59 ` santosh.shilimkar
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