From: Thara Gopinath <thara.gopinath@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
herbert@gondor.apana.org.au, davem@davemloft.net,
robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com
Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCH 5/6] dts:qcom:sdm845: Add dt entries to support crypto engine.
Date: Tue, 17 Nov 2020 08:47:13 -0500 [thread overview]
Message-ID: <20201117134714.3456446-6-thara.gopinath@linaro.org> (raw)
In-Reply-To: <20201117134714.3456446-1-thara.gopinath@linaro.org>
Add crypto engine (CE) and CE BAM related nodes and definitions to
"sdm845.dtsi".
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 30 ++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 40e8c11f23ab..b5b2ea97681f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2138,6 +2138,36 @@ ufs_mem_phy_lanes: lanes@1d87400 {
};
};
+ cryptobam: dma@1dc4000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rpmhcc RPMH_CE_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely = <1>;
+ iommus = <&apps_smmu 0x704 0x1>,
+ <&apps_smmu 0x706 0x1>,
+ <&apps_smmu 0x714 0x1>,
+ <&apps_smmu 0x716 0x1>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,crypto-v5.4";
+ reg = <0 0x01dfa000 0 0x6000>;
+ clocks = <&gcc GCC_CE1_AHB_CLK>,
+ <&gcc GCC_CE1_AHB_CLK>,
+ <&rpmhcc RPMH_CE_CLK>;
+ clock-names = "iface", "bus", "core";
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x704 0x1>,
+ <&apps_smmu 0x706 0x1>,
+ <&apps_smmu 0x714 0x1>,
+ <&apps_smmu 0x716 0x1>;
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sdm845-ipa";
--
2.25.1
next prev parent reply other threads:[~2020-11-17 13:47 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 13:47 [PATCH 0/6] Enable Qualcomm Crypto Engine on sdm845 Thara Gopinath
2020-11-17 13:47 ` [PATCH 1/6] dt-binding:clock: Add entry for crypto engine RPMH clock resource Thara Gopinath
2020-11-18 3:57 ` Bjorn Andersson
2020-11-17 13:47 ` [PATCH 2/6] clk:qcom:rpmh: Add CE clock on sdm845 Thara Gopinath
2020-11-18 3:59 ` Bjorn Andersson
2020-11-17 13:47 ` [PATCH 3/6] drivers:crypto:qce: Enable support for crypto engine " Thara Gopinath
2020-11-18 4:02 ` Bjorn Andersson
2020-11-17 13:47 ` [PATCH 4/6] drivers:crypto:qce: Fix SHA result buffer corruption issues Thara Gopinath
2020-11-18 4:04 ` Bjorn Andersson
2020-11-17 13:47 ` Thara Gopinath [this message]
2020-11-18 4:10 ` [PATCH 5/6] dts:qcom:sdm845: Add dt entries to support crypto engine Bjorn Andersson
2020-11-18 19:58 ` Thara Gopinath
2020-11-17 13:47 ` [PATCH 6/6] devicetree:bindings:crypto: Extend qcom-qce binding to add support for crypto engine version 5.4 Thara Gopinath
2020-11-18 4:08 ` Bjorn Andersson
2020-11-17 16:57 ` [PATCH 0/6] Enable Qualcomm Crypto Engine on sdm845 Eric Biggers
2020-11-17 18:07 ` Thara Gopinath
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