[PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[Atish Patra]

This series attempts to move the ARM64 numa implementation to common
code so that RISC-V can leverage that as well instead of reimplementing
it again.

RISC-V specific bits are based on initial work done by Greentime Hu [1] but
modified to reuse the common implementation to avoid duplication.

[1] https://lkml.org/lkml/2020/1/10/233

This series has been tested on qemu with numa enabled for both RISC-V & ARM64.
It would be great if somebody can test it on numa capable ARM64 hardware platforms.
This patch series doesn't modify the maintainers list for the common code (arch_numa)
as I am not sure if somebody from ARM64 community or Greg should take up the
maintainership. Ganapatrao was the original author of the arm64 version.
I would be happy to update that in the next revision once it is decided.

# numactl --hardware
available: 2 nodes (0-1)
node 0 cpus: 0 1 2 3
node 0 size: 486 MB
node 0 free: 470 MB
node 1 cpus: 4 5 6 7
node 1 size: 424 MB
node 1 free: 408 MB
node distances:
node   0   1 
  0:  10  20 
  1:  20  10 
# numactl -show
policy: default
preferred node: current
physcpubind: 0 1 2 3 4 5 6 7 
cpubind: 0 1 
nodebind: 0 1 
membind: 0 1 

The patches are also available at
https://github.com/atishp04/linux/tree/5.11_numa_unified_v5

For RISC-V, the following qemu series is a pre-requisite(already available in upstream)
https://patchwork.kernel.org/project/qemu-devel/list/?series=303313

Testing:
RISC-V:
Tested in Qemu and 2 socket OmniXtend FPGA.

ARM64:
2 socket kunpeng920 (4 nodes around 250G a node)
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Changes from v4->v5:
1. Added by Acked-by & Reviewed-by tags.
2. Swapped patch 1 & 2 in v4 version.

Changes from v3->v4:
1. Removed redundant duplicate header.
2. Added Reviewed-by tags.

Changes from v2->v3:
1. Added Acked-by/Reviewed-by tags.
2. Replaced asm/acpi.h with linux/acpi.h
3. Defined arch_acpi_numa_init as static.

Changes from v1->v2:
1. Replaced ARM64 specific compile time protection with ACPI specific ones.
2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. 
3. Fixed few typos.

Atish Patra (4):
arm64, numa: Change the numa init functions name to be generic
numa: Move numa implementation to common code
riscv: Separate memory init from paging init
riscv: Add numa support for riscv64 platform

Greentime Hu (1):
riscv: Add support pte_protnone and pmd_protnone if
CONFIG_NUMA_BALANCING

arch/arm64/Kconfig                            |  1 +
arch/arm64/include/asm/numa.h                 | 48 +----------------
arch/arm64/kernel/acpi_numa.c                 | 12 -----
arch/arm64/mm/Makefile                        |  1 -
arch/arm64/mm/init.c                          |  4 +-
arch/riscv/Kconfig                            | 31 ++++++++++-
arch/riscv/include/asm/mmzone.h               | 13 +++++
arch/riscv/include/asm/numa.h                 |  8 +++
arch/riscv/include/asm/pci.h                  | 14 +++++
arch/riscv/include/asm/pgtable.h              | 21 ++++++++
arch/riscv/kernel/setup.c                     | 11 +++-
arch/riscv/kernel/smpboot.c                   | 12 ++++-
arch/riscv/mm/init.c                          | 10 +++-
drivers/base/Kconfig                          |  6 +++
drivers/base/Makefile                         |  1 +
.../mm/numa.c => drivers/base/arch_numa.c     | 27 ++++++++--
include/asm-generic/numa.h                    | 52 +++++++++++++++++++
17 files changed, 200 insertions(+), 72 deletions(-)
create mode 100644 arch/riscv/include/asm/mmzone.h
create mode 100644 arch/riscv/include/asm/numa.h
rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%)
create mode 100644 include/asm-generic/numa.h

--
2.25.1

[PATCH v5 1/5] arm64, numa: Change the numa init functions name to be generic

[Atish Patra]

This is a preparatory patch for unifying numa implementation between
ARM64 & RISC-V. As the numa implementation will be moved to generic
code, rename the arm64 related functions to a generic one.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/include/asm/numa.h |  4 ++--
 arch/arm64/kernel/acpi_numa.c | 12 ------------
 arch/arm64/mm/init.c          |  4 ++--
 arch/arm64/mm/numa.c          | 27 +++++++++++++++++++++++----
 4 files changed, 27 insertions(+), 20 deletions(-)

diff --git a/arch/arm64/include/asm/numa.h b/arch/arm64/include/asm/numa.h
index dd870390d639..ffc1dcdf1871 100644
--- a/arch/arm64/include/asm/numa.h
+++ b/arch/arm64/include/asm/numa.h
@@ -32,7 +32,7 @@ static inline const struct cpumask *cpumask_of_node(int node)
 }
 #endif
 
-void __init arm64_numa_init(void);
+void __init arch_numa_init(void);
 int __init numa_add_memblk(int nodeid, u64 start, u64 end);
 void __init numa_set_distance(int from, int to, int distance);
 void __init numa_free_distance(void);
@@ -46,7 +46,7 @@ void numa_remove_cpu(unsigned int cpu);
 static inline void numa_store_cpu_info(unsigned int cpu) { }
 static inline void numa_add_cpu(unsigned int cpu) { }
 static inline void numa_remove_cpu(unsigned int cpu) { }
-static inline void arm64_numa_init(void) { }
+static inline void arch_numa_init(void) { }
 static inline void early_map_cpu_to_node(unsigned int cpu, int nid) { }
 
 #endif	/* CONFIG_NUMA */
diff --git a/arch/arm64/kernel/acpi_numa.c b/arch/arm64/kernel/acpi_numa.c
index 7ff800045434..fdfecf0991ce 100644
--- a/arch/arm64/kernel/acpi_numa.c
+++ b/arch/arm64/kernel/acpi_numa.c
@@ -118,15 +118,3 @@ void __init acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa)
 	node_set(node, numa_nodes_parsed);
 }
 
-int __init arm64_acpi_numa_init(void)
-{
-	int ret;
-
-	ret = acpi_numa_init();
-	if (ret) {
-		pr_info("Failed to initialise from firmware\n");
-		return ret;
-	}
-
-	return srat_disabled() ? -EINVAL : 0;
-}
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 095540667f0f..977b47f6815a 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -407,10 +407,10 @@ void __init bootmem_init(void)
 	max_pfn = max_low_pfn = max;
 	min_low_pfn = min;
 
-	arm64_numa_init();
+	arch_numa_init();
 
 	/*
-	 * must be done after arm64_numa_init() which calls numa_init() to
+	 * must be done after arch_numa_init() which calls numa_init() to
 	 * initialize node_online_map that gets used in hugetlb_cma_reserve()
 	 * while allocating required CMA size across online nodes.
 	 */
diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
index a8303bc6b62a..0dae54ce7d43 100644
--- a/arch/arm64/mm/numa.c
+++ b/arch/arm64/mm/numa.c
@@ -13,7 +13,6 @@
 #include <linux/module.h>
 #include <linux/of.h>
 
-#include <asm/acpi.h>
 #include <asm/sections.h>
 
 struct pglist_data *node_data[MAX_NUMNODES] __read_mostly;
@@ -445,16 +444,36 @@ static int __init dummy_numa_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_ACPI_NUMA
+static int __init arch_acpi_numa_init(void)
+{
+	int ret;
+
+	ret = acpi_numa_init();
+	if (ret) {
+		pr_info("Failed to initialise from firmware\n");
+		return ret;
+	}
+
+	return srat_disabled() ? -EINVAL : 0;
+}
+#else
+static int __init arch_acpi_numa_init(void)
+{
+	return -EOPNOTSUPP;
+}
+#endif
+
 /**
- * arm64_numa_init() - Initialize NUMA
+ * arch_numa_init() - Initialize NUMA
  *
  * Try each configured NUMA initialization method until one succeeds. The
  * last fallback is dummy single node config encompassing whole memory.
  */
-void __init arm64_numa_init(void)
+void __init arch_numa_init(void)
 {
 	if (!numa_off) {
-		if (!acpi_disabled && !numa_init(arm64_acpi_numa_init))
+		if (!acpi_disabled && !numa_init(arch_acpi_numa_init))
 			return;
 		if (acpi_disabled && !numa_init(of_numa_init))
 			return;
-- 
2.25.1

[PATCH v5 2/5] numa: Move numa implementation to common code

[Atish Patra]

ARM64 numa implementation is generic enough that RISC-V can reuse that
implementation with very minor cosmetic changes. This will help both
ARM64 and RISC-V in terms of maintanace and feature improvement

Move the numa implementation code to common directory so that both ISAs
can reuse this. This doesn't introduce any function changes for ARM64.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/Kconfig                            |  1 +
 arch/arm64/include/asm/numa.h                 | 48 +----------------
 arch/arm64/mm/Makefile                        |  1 -
 drivers/base/Kconfig                          |  6 +++
 drivers/base/Makefile                         |  1 +
 .../mm/numa.c => drivers/base/arch_numa.c     |  0
 include/asm-generic/numa.h                    | 52 +++++++++++++++++++
 7 files changed, 61 insertions(+), 48 deletions(-)
 rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (100%)
 create mode 100644 include/asm-generic/numa.h

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1515f6f153a0..4ebef80274fd 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -990,6 +990,7 @@ config HOTPLUG_CPU
 # Common NUMA Features
 config NUMA
 	bool "NUMA Memory Allocation and Scheduler Support"
+	select GENERIC_ARCH_NUMA
 	select ACPI_NUMA if ACPI
 	select OF_NUMA
 	help
diff --git a/arch/arm64/include/asm/numa.h b/arch/arm64/include/asm/numa.h
index ffc1dcdf1871..8c8cf4297cc3 100644
--- a/arch/arm64/include/asm/numa.h
+++ b/arch/arm64/include/asm/numa.h
@@ -3,52 +3,6 @@
 #define __ASM_NUMA_H
 
 #include <asm/topology.h>
-
-#ifdef CONFIG_NUMA
-
-#define NR_NODE_MEMBLKS		(MAX_NUMNODES * 2)
-
-int __node_distance(int from, int to);
-#define node_distance(a, b) __node_distance(a, b)
-
-extern nodemask_t numa_nodes_parsed __initdata;
-
-extern bool numa_off;
-
-/* Mappings between node number and cpus on that node. */
-extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
-void numa_clear_node(unsigned int cpu);
-
-#ifdef CONFIG_DEBUG_PER_CPU_MAPS
-const struct cpumask *cpumask_of_node(int node);
-#else
-/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
-static inline const struct cpumask *cpumask_of_node(int node)
-{
-	if (node == NUMA_NO_NODE)
-		return cpu_all_mask;
-
-	return node_to_cpumask_map[node];
-}
-#endif
-
-void __init arch_numa_init(void);
-int __init numa_add_memblk(int nodeid, u64 start, u64 end);
-void __init numa_set_distance(int from, int to, int distance);
-void __init numa_free_distance(void);
-void __init early_map_cpu_to_node(unsigned int cpu, int nid);
-void numa_store_cpu_info(unsigned int cpu);
-void numa_add_cpu(unsigned int cpu);
-void numa_remove_cpu(unsigned int cpu);
-
-#else	/* CONFIG_NUMA */
-
-static inline void numa_store_cpu_info(unsigned int cpu) { }
-static inline void numa_add_cpu(unsigned int cpu) { }
-static inline void numa_remove_cpu(unsigned int cpu) { }
-static inline void arch_numa_init(void) { }
-static inline void early_map_cpu_to_node(unsigned int cpu, int nid) { }
-
-#endif	/* CONFIG_NUMA */
+#include <asm-generic/numa.h>
 
 #endif	/* __ASM_NUMA_H */
diff --git a/arch/arm64/mm/Makefile b/arch/arm64/mm/Makefile
index 5ead3c3de3b6..cd60e4fed78f 100644
--- a/arch/arm64/mm/Makefile
+++ b/arch/arm64/mm/Makefile
@@ -6,7 +6,6 @@ obj-y				:= dma-mapping.o extable.o fault.o init.o \
 obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o
 obj-$(CONFIG_PTDUMP_CORE)	+= ptdump.o
 obj-$(CONFIG_PTDUMP_DEBUGFS)	+= ptdump_debugfs.o
-obj-$(CONFIG_NUMA)		+= numa.o
 obj-$(CONFIG_DEBUG_VIRTUAL)	+= physaddr.o
 obj-$(CONFIG_ARM64_MTE)		+= mteswap.o
 KASAN_SANITIZE_physaddr.o	+= n
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index 8d7001712062..c5956c8845cc 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -210,4 +210,10 @@ config GENERIC_ARCH_TOPOLOGY
 	  appropriate scaling, sysfs interface for reading capacity values at
 	  runtime.
 
+config GENERIC_ARCH_NUMA
+	bool
+	help
+	  Enable support for generic NUMA implementation. Currently, RISC-V
+	  and ARM64 uses it.
+
 endmenu
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
index 41369fc7004f..7d65ea07de65 100644
--- a/drivers/base/Makefile
+++ b/drivers/base/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_PINCTRL) += pinctrl.o
 obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
 obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o
 obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
+obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o
 
 obj-y			+= test/
 
diff --git a/arch/arm64/mm/numa.c b/drivers/base/arch_numa.c
similarity index 100%
rename from arch/arm64/mm/numa.c
rename to drivers/base/arch_numa.c
diff --git a/include/asm-generic/numa.h b/include/asm-generic/numa.h
new file mode 100644
index 000000000000..1a3ad6d29833
--- /dev/null
+++ b/include/asm-generic/numa.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_GENERIC_NUMA_H
+#define __ASM_GENERIC_NUMA_H
+
+#ifdef CONFIG_NUMA
+
+#define NR_NODE_MEMBLKS		(MAX_NUMNODES * 2)
+
+int __node_distance(int from, int to);
+#define node_distance(a, b) __node_distance(a, b)
+
+extern nodemask_t numa_nodes_parsed __initdata;
+
+extern bool numa_off;
+
+/* Mappings between node number and cpus on that node. */
+extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
+void numa_clear_node(unsigned int cpu);
+
+#ifdef CONFIG_DEBUG_PER_CPU_MAPS
+const struct cpumask *cpumask_of_node(int node);
+#else
+/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
+static inline const struct cpumask *cpumask_of_node(int node)
+{
+	if (node == NUMA_NO_NODE)
+		return cpu_all_mask;
+
+	return node_to_cpumask_map[node];
+}
+#endif
+
+void __init arch_numa_init(void);
+int __init numa_add_memblk(int nodeid, u64 start, u64 end);
+void __init numa_set_distance(int from, int to, int distance);
+void __init numa_free_distance(void);
+void __init early_map_cpu_to_node(unsigned int cpu, int nid);
+void numa_store_cpu_info(unsigned int cpu);
+void numa_add_cpu(unsigned int cpu);
+void numa_remove_cpu(unsigned int cpu);
+
+#else	/* CONFIG_NUMA */
+
+static inline void numa_store_cpu_info(unsigned int cpu) { }
+static inline void numa_add_cpu(unsigned int cpu) { }
+static inline void numa_remove_cpu(unsigned int cpu) { }
+static inline void arch_numa_init(void) { }
+static inline void early_map_cpu_to_node(unsigned int cpu, int nid) { }
+
+#endif	/* CONFIG_NUMA */
+
+#endif	/* __ASM_GENERIC_NUMA_H */
-- 
2.25.1

[PATCH v5 3/5] riscv: Separate memory init from paging init

[Atish Patra]

Currently, we perform some memory init functions in paging init. But,
that will be an issue for NUMA support where DT needs to be flattened
before numa initialization and memblock_present can only be called
after numa initialization.

Move memory initialization related functions to a separate function.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
 arch/riscv/include/asm/pgtable.h | 1 +
 arch/riscv/kernel/setup.c        | 1 +
 arch/riscv/mm/init.c             | 6 +++++-
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 183f1f4b2ae6..a0f8a86236e8 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -471,6 +471,7 @@ extern void *dtb_early_va;
 extern uintptr_t dtb_early_pa;
 void setup_bootmem(void);
 void paging_init(void);
+void misc_mem_init(void);
 
 #define FIRST_USER_ADDRESS  0
 
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index c424cc6dd833..eb1cbdc29ea7 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -88,6 +88,7 @@ void __init setup_arch(char **cmdline_p)
 	else
 		pr_err("No DTB found in kernel mappings\n");
 #endif
+	misc_mem_init();
 
 #ifdef CONFIG_SWIOTLB
 	swiotlb_init(1);
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 8e577f14f120..826e7de73f45 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -664,8 +664,12 @@ static void __init resource_init(void)
 void __init paging_init(void)
 {
 	setup_vm_final();
-	sparse_init();
 	setup_zero_page();
+}
+
+void __init misc_mem_init(void)
+{
+	sparse_init();
 	zone_sizes_init();
 	resource_init();
 }
-- 
2.25.1

[PATCH v5 4/5] riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING

[Atish Patra]

From: Greentime Hu <greentime.hu@sifive.com>

These two functions are used to distinguish between PROT_NONENUMA
protections and hinting fault protections.

Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
 arch/riscv/include/asm/pgtable.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index a0f8a86236e8..64aba4f7a0ed 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -187,6 +187,11 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
 	return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
 }
 
+static inline pte_t pmd_pte(pmd_t pmd)
+{
+	return __pte(pmd_val(pmd));
+}
+
 /* Yields the page frame number (PFN) of a page table entry */
 static inline unsigned long pte_pfn(pte_t pte)
 {
@@ -290,6 +295,21 @@ static inline pte_t pte_mkhuge(pte_t pte)
 	return pte;
 }
 
+#ifdef CONFIG_NUMA_BALANCING
+/*
+ * See the comment in include/asm-generic/pgtable.h
+ */
+static inline int pte_protnone(pte_t pte)
+{
+	return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
+}
+
+static inline int pmd_protnone(pmd_t pmd)
+{
+	return pte_protnone(pmd_pte(pmd));
+}
+#endif
+
 /* Modify page protection bits */
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
-- 
2.25.1

[PATCH v5 5/5] riscv: Add numa support for riscv64 platform

[Atish Patra]

Use the generic numa implementation to add NUMA support for RISC-V.
This is based on Greentime's patch[1] but modified to use generic NUMA
implementation and few more fixes.

[1] https://lkml.org/lkml/2020/1/10/233

Co-developed-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
 arch/riscv/Kconfig              | 31 ++++++++++++++++++++++++++++++-
 arch/riscv/include/asm/mmzone.h | 13 +++++++++++++
 arch/riscv/include/asm/numa.h   |  8 ++++++++
 arch/riscv/include/asm/pci.h    | 14 ++++++++++++++
 arch/riscv/kernel/setup.c       | 10 ++++++++--
 arch/riscv/kernel/smpboot.c     | 12 +++++++++++-
 arch/riscv/mm/init.c            |  4 +++-
 7 files changed, 87 insertions(+), 5 deletions(-)
 create mode 100644 arch/riscv/include/asm/mmzone.h
 create mode 100644 arch/riscv/include/asm/numa.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 44377fd7860e..5414fe747f64 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -140,7 +140,7 @@ config PAGE_OFFSET
 	default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
 
 config ARCH_FLATMEM_ENABLE
-	def_bool y
+	def_bool !NUMA
 
 config ARCH_SPARSEMEM_ENABLE
 	def_bool y
@@ -298,6 +298,35 @@ config TUNE_GENERIC
 
 endchoice
 
+# Common NUMA Features
+config NUMA
+	bool "NUMA Memory Allocation and Scheduler Support"
+	select GENERIC_ARCH_NUMA
+	select OF_NUMA
+	select ARCH_SUPPORTS_NUMA_BALANCING
+	help
+	  Enable NUMA (Non-Uniform Memory Access) support.
+
+	  The kernel will try to allocate memory used by a CPU on the
+	  local memory of the CPU and add some more NUMA awareness to the kernel.
+
+config NODES_SHIFT
+	int "Maximum NUMA Nodes (as a power of 2)"
+	range 1 10
+	default "2"
+	depends on NEED_MULTIPLE_NODES
+	help
+	  Specify the maximum number of NUMA Nodes available on the target
+	  system.  Increases memory reserved to accommodate various tables.
+
+config USE_PERCPU_NUMA_NODE_ID
+	def_bool y
+	depends on NUMA
+
+config NEED_PER_CPU_EMBED_FIRST_CHUNK
+	def_bool y
+	depends on NUMA
+
 config RISCV_ISA_C
 	bool "Emit compressed instructions when building Linux"
 	default y
diff --git a/arch/riscv/include/asm/mmzone.h b/arch/riscv/include/asm/mmzone.h
new file mode 100644
index 000000000000..fa17e01d9ab2
--- /dev/null
+++ b/arch/riscv/include/asm/mmzone.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_MMZONE_H
+#define __ASM_MMZONE_H
+
+#ifdef CONFIG_NUMA
+
+#include <asm/numa.h>
+
+extern struct pglist_data *node_data[];
+#define NODE_DATA(nid)		(node_data[(nid)])
+
+#endif /* CONFIG_NUMA */
+#endif /* __ASM_MMZONE_H */
diff --git a/arch/riscv/include/asm/numa.h b/arch/riscv/include/asm/numa.h
new file mode 100644
index 000000000000..8c8cf4297cc3
--- /dev/null
+++ b/arch/riscv/include/asm/numa.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_NUMA_H
+#define __ASM_NUMA_H
+
+#include <asm/topology.h>
+#include <asm-generic/numa.h>
+
+#endif	/* __ASM_NUMA_H */
diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h
index 1c473a1bd986..658e112c3ce7 100644
--- a/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@ -32,6 +32,20 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 	/* always show the domain in /proc */
 	return 1;
 }
+
+#ifdef	CONFIG_NUMA
+
+static inline int pcibus_to_node(struct pci_bus *bus)
+{
+	return dev_to_node(&bus->dev);
+}
+#ifndef cpumask_of_pcibus
+#define cpumask_of_pcibus(bus)	(pcibus_to_node(bus) == -1 ?		\
+				 cpu_all_mask :				\
+				 cpumask_of_node(pcibus_to_node(bus)))
+#endif
+#endif	/* CONFIG_NUMA */
+
 #endif  /* CONFIG_PCI */
 
 #endif  /* _ASM_RISCV_PCI_H */
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index eb1cbdc29ea7..26712745c5df 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -111,13 +111,19 @@ void __init setup_arch(char **cmdline_p)
 
 static int __init topology_init(void)
 {
-	int i;
+	int i, ret;
+
+	for_each_online_node(i)
+		register_one_node(i);
 
 	for_each_possible_cpu(i) {
 		struct cpu *cpu = &per_cpu(cpu_devices, i);
 
 		cpu->hotpluggable = cpu_has_hotplug(i);
-		register_cpu(cpu, i);
+		ret = register_cpu(cpu, i);
+		if (unlikely(ret))
+			pr_warn("Warning: %s: register_cpu %d failed (%d)\n",
+			       __func__, i, ret);
 	}
 
 	return 0;
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 96167d55ed98..5e276c25646f 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -27,6 +27,7 @@
 #include <asm/cpu_ops.h>
 #include <asm/irq.h>
 #include <asm/mmu_context.h>
+#include <asm/numa.h>
 #include <asm/tlbflush.h>
 #include <asm/sections.h>
 #include <asm/sbi.h>
@@ -45,13 +46,18 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	int cpuid;
 	int ret;
+	unsigned int curr_cpuid;
+
+	curr_cpuid = smp_processor_id();
+	numa_store_cpu_info(curr_cpuid);
+	numa_add_cpu(curr_cpuid);
 
 	/* This covers non-smp usecase mandated by "nosmp" option */
 	if (max_cpus == 0)
 		return;
 
 	for_each_possible_cpu(cpuid) {
-		if (cpuid == smp_processor_id())
+		if (cpuid == curr_cpuid)
 			continue;
 		if (cpu_ops[cpuid]->cpu_prepare) {
 			ret = cpu_ops[cpuid]->cpu_prepare(cpuid);
@@ -59,6 +65,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 				continue;
 		}
 		set_cpu_present(cpuid, true);
+		numa_store_cpu_info(cpuid);
 	}
 }
 
@@ -79,6 +86,7 @@ void __init setup_smp(void)
 		if (hart == cpuid_to_hartid_map(0)) {
 			BUG_ON(found_boot_cpu);
 			found_boot_cpu = 1;
+			early_map_cpu_to_node(0, of_node_to_nid(dn));
 			continue;
 		}
 		if (cpuid >= NR_CPUS) {
@@ -88,6 +96,7 @@ void __init setup_smp(void)
 		}
 
 		cpuid_to_hartid_map(cpuid) = hart;
+		early_map_cpu_to_node(cpuid, of_node_to_nid(dn));
 		cpuid++;
 	}
 
@@ -153,6 +162,7 @@ asmlinkage __visible void smp_callin(void)
 	current->active_mm = mm;
 
 	notify_cpu_starting(curr_cpuid);
+	numa_add_cpu(curr_cpuid);
 	update_siblings_masks(curr_cpuid);
 	set_cpu_online(curr_cpuid, 1);
 
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 826e7de73f45..e1f1b149dfba 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -20,6 +20,7 @@
 #include <asm/soc.h>
 #include <asm/io.h>
 #include <asm/ptdump.h>
+#include <asm/numa.h>
 
 #include "../kernel/head.h"
 
@@ -195,7 +196,6 @@ void __init setup_bootmem(void)
 
 	early_init_fdt_scan_reserved_mem();
 	memblock_allow_resize();
-	memblock_dump_all();
 }
 
 #ifdef CONFIG_MMU
@@ -669,9 +669,11 @@ void __init paging_init(void)
 
 void __init misc_mem_init(void)
 {
+	arch_numa_init();
 	sparse_init();
 	zone_sizes_init();
 	resource_init();
+	memblock_dump_all();
 }
 
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
-- 
2.25.1

Re: [PATCH v5 2/5] numa: Move numa implementation to common code

[Randy Dunlap]

On 11/18/20 4:38 PM, Atish Patra wrote:
> diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
> index 8d7001712062..c5956c8845cc 100644
> --- a/drivers/base/Kconfig
> +++ b/drivers/base/Kconfig
> @@ -210,4 +210,10 @@ config GENERIC_ARCH_TOPOLOGY
>  	  appropriate scaling, sysfs interface for reading capacity values at
>  	  runtime.
>  
> +config GENERIC_ARCH_NUMA
> +	bool
> +	help
> +	  Enable support for generic NUMA implementation. Currently, RISC-V
> +	  and ARM64 uses it.

	            use it.

> +
>  endmenu


-- 
~Randy

Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[Atish Patra]

On Wed, Nov 18, 2020 at 4:39 PM Atish Patra <atish.patra@wdc.com> wrote:
>
> This series attempts to move the ARM64 numa implementation to common
> code so that RISC-V can leverage that as well instead of reimplementing
> it again.
>
> RISC-V specific bits are based on initial work done by Greentime Hu [1] but
> modified to reuse the common implementation to avoid duplication.
>
> [1] https://lkml.org/lkml/2020/1/10/233
>
> This series has been tested on qemu with numa enabled for both RISC-V & ARM64.
> It would be great if somebody can test it on numa capable ARM64 hardware platforms.
> This patch series doesn't modify the maintainers list for the common code (arch_numa)
> as I am not sure if somebody from ARM64 community or Greg should take up the
> maintainership. Ganapatrao was the original author of the arm64 version.
> I would be happy to update that in the next revision once it is decided.
>
> # numactl --hardware
> available: 2 nodes (0-1)
> node 0 cpus: 0 1 2 3
> node 0 size: 486 MB
> node 0 free: 470 MB
> node 1 cpus: 4 5 6 7
> node 1 size: 424 MB
> node 1 free: 408 MB
> node distances:
> node   0   1
>   0:  10  20
>   1:  20  10
> # numactl -show
> policy: default
> preferred node: current
> physcpubind: 0 1 2 3 4 5 6 7
> cpubind: 0 1
> nodebind: 0 1
> membind: 0 1
>
> The patches are also available at
> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5
>
> For RISC-V, the following qemu series is a pre-requisite(already available in upstream)
> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313
>
> Testing:
> RISC-V:
> Tested in Qemu and 2 socket OmniXtend FPGA.
>
> ARM64:
> 2 socket kunpeng920 (4 nodes around 250G a node)
> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> Changes from v4->v5:
> 1. Added by Acked-by & Reviewed-by tags.
> 2. Swapped patch 1 & 2 in v4 version.
>
> Changes from v3->v4:
> 1. Removed redundant duplicate header.
> 2. Added Reviewed-by tags.
>
> Changes from v2->v3:
> 1. Added Acked-by/Reviewed-by tags.
> 2. Replaced asm/acpi.h with linux/acpi.h
> 3. Defined arch_acpi_numa_init as static.
>
> Changes from v1->v2:
> 1. Replaced ARM64 specific compile time protection with ACPI specific ones.
> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V.
> 3. Fixed few typos.
>
> Atish Patra (4):
> arm64, numa: Change the numa init functions name to be generic
> numa: Move numa implementation to common code
> riscv: Separate memory init from paging init
> riscv: Add numa support for riscv64 platform
>
> Greentime Hu (1):
> riscv: Add support pte_protnone and pmd_protnone if
> CONFIG_NUMA_BALANCING
>
> arch/arm64/Kconfig                            |  1 +
> arch/arm64/include/asm/numa.h                 | 48 +----------------
> arch/arm64/kernel/acpi_numa.c                 | 12 -----
> arch/arm64/mm/Makefile                        |  1 -
> arch/arm64/mm/init.c                          |  4 +-
> arch/riscv/Kconfig                            | 31 ++++++++++-
> arch/riscv/include/asm/mmzone.h               | 13 +++++
> arch/riscv/include/asm/numa.h                 |  8 +++
> arch/riscv/include/asm/pci.h                  | 14 +++++
> arch/riscv/include/asm/pgtable.h              | 21 ++++++++
> arch/riscv/kernel/setup.c                     | 11 +++-
> arch/riscv/kernel/smpboot.c                   | 12 ++++-
> arch/riscv/mm/init.c                          | 10 +++-
> drivers/base/Kconfig                          |  6 +++
> drivers/base/Makefile                         |  1 +
> .../mm/numa.c => drivers/base/arch_numa.c     | 27 ++++++++--
> include/asm-generic/numa.h                    | 52 +++++++++++++++++++
> 17 files changed, 200 insertions(+), 72 deletions(-)
> create mode 100644 arch/riscv/include/asm/mmzone.h
> create mode 100644 arch/riscv/include/asm/numa.h
> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%)
> create mode 100644 include/asm-generic/numa.h
>
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Hey Palmer,
I did not see this series in for-next. Let me know if you need
anything else to be done for this series.

-- 
Regards,
Atish

Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[Palmer Dabbelt]

On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote:
> On Wed, Nov 18, 2020 at 4:39 PM Atish Patra <atish.patra@wdc.com> wrote:
>>
>> This series attempts to move the ARM64 numa implementation to common
>> code so that RISC-V can leverage that as well instead of reimplementing
>> it again.
>>
>> RISC-V specific bits are based on initial work done by Greentime Hu [1] but
>> modified to reuse the common implementation to avoid duplication.
>>
>> [1] https://lkml.org/lkml/2020/1/10/233
>>
>> This series has been tested on qemu with numa enabled for both RISC-V & ARM64.
>> It would be great if somebody can test it on numa capable ARM64 hardware platforms.
>> This patch series doesn't modify the maintainers list for the common code (arch_numa)
>> as I am not sure if somebody from ARM64 community or Greg should take up the
>> maintainership. Ganapatrao was the original author of the arm64 version.
>> I would be happy to update that in the next revision once it is decided.
>>
>> # numactl --hardware
>> available: 2 nodes (0-1)
>> node 0 cpus: 0 1 2 3
>> node 0 size: 486 MB
>> node 0 free: 470 MB
>> node 1 cpus: 4 5 6 7
>> node 1 size: 424 MB
>> node 1 free: 408 MB
>> node distances:
>> node   0   1
>>   0:  10  20
>>   1:  20  10
>> # numactl -show
>> policy: default
>> preferred node: current
>> physcpubind: 0 1 2 3 4 5 6 7
>> cpubind: 0 1
>> nodebind: 0 1
>> membind: 0 1
>>
>> The patches are also available at
>> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5
>>
>> For RISC-V, the following qemu series is a pre-requisite(already available in upstream)
>> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313
>>
>> Testing:
>> RISC-V:
>> Tested in Qemu and 2 socket OmniXtend FPGA.
>>
>> ARM64:
>> 2 socket kunpeng920 (4 nodes around 250G a node)
>> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>>
>> Changes from v4->v5:
>> 1. Added by Acked-by & Reviewed-by tags.
>> 2. Swapped patch 1 & 2 in v4 version.
>>
>> Changes from v3->v4:
>> 1. Removed redundant duplicate header.
>> 2. Added Reviewed-by tags.
>>
>> Changes from v2->v3:
>> 1. Added Acked-by/Reviewed-by tags.
>> 2. Replaced asm/acpi.h with linux/acpi.h
>> 3. Defined arch_acpi_numa_init as static.
>>
>> Changes from v1->v2:
>> 1. Replaced ARM64 specific compile time protection with ACPI specific ones.
>> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V.
>> 3. Fixed few typos.
>>
>> Atish Patra (4):
>> arm64, numa: Change the numa init functions name to be generic
>> numa: Move numa implementation to common code
>> riscv: Separate memory init from paging init
>> riscv: Add numa support for riscv64 platform
>>
>> Greentime Hu (1):
>> riscv: Add support pte_protnone and pmd_protnone if
>> CONFIG_NUMA_BALANCING
>>
>> arch/arm64/Kconfig                            |  1 +
>> arch/arm64/include/asm/numa.h                 | 48 +----------------
>> arch/arm64/kernel/acpi_numa.c                 | 12 -----
>> arch/arm64/mm/Makefile                        |  1 -
>> arch/arm64/mm/init.c                          |  4 +-
>> arch/riscv/Kconfig                            | 31 ++++++++++-
>> arch/riscv/include/asm/mmzone.h               | 13 +++++
>> arch/riscv/include/asm/numa.h                 |  8 +++
>> arch/riscv/include/asm/pci.h                  | 14 +++++
>> arch/riscv/include/asm/pgtable.h              | 21 ++++++++
>> arch/riscv/kernel/setup.c                     | 11 +++-
>> arch/riscv/kernel/smpboot.c                   | 12 ++++-
>> arch/riscv/mm/init.c                          | 10 +++-
>> drivers/base/Kconfig                          |  6 +++
>> drivers/base/Makefile                         |  1 +
>> .../mm/numa.c => drivers/base/arch_numa.c     | 27 ++++++++--
>> include/asm-generic/numa.h                    | 52 +++++++++++++++++++
>> 17 files changed, 200 insertions(+), 72 deletions(-)
>> create mode 100644 arch/riscv/include/asm/mmzone.h
>> create mode 100644 arch/riscv/include/asm/numa.h
>> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%)
>> create mode 100644 include/asm-generic/numa.h
>>
>> --
>> 2.25.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> Hey Palmer,
> I did not see this series in for-next. Let me know if you need
> anything else to be done for this series.

Sorry about that.  It's on for-next, with Randy's comment addressed.  There was
one merge conflict: we don't have resource_init() in for-next yet (which I
think means I missed something else).  IDK if that's necessary for the NUMA
stuff, I just dropped it.  I haven't tested this yet.

Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[Atish Patra]

On Sat, Jan 9, 2021 at 12:51 PM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote:
> > On Wed, Nov 18, 2020 at 4:39 PM Atish Patra <atish.patra@wdc.com> wrote:
> >>
> >> This series attempts to move the ARM64 numa implementation to common
> >> code so that RISC-V can leverage that as well instead of reimplementing
> >> it again.
> >>
> >> RISC-V specific bits are based on initial work done by Greentime Hu [1] but
> >> modified to reuse the common implementation to avoid duplication.
> >>
> >> [1] https://lkml.org/lkml/2020/1/10/233
> >>
> >> This series has been tested on qemu with numa enabled for both RISC-V & ARM64.
> >> It would be great if somebody can test it on numa capable ARM64 hardware platforms.
> >> This patch series doesn't modify the maintainers list for the common code (arch_numa)
> >> as I am not sure if somebody from ARM64 community or Greg should take up the
> >> maintainership. Ganapatrao was the original author of the arm64 version.
> >> I would be happy to update that in the next revision once it is decided.
> >>
> >> # numactl --hardware
> >> available: 2 nodes (0-1)
> >> node 0 cpus: 0 1 2 3
> >> node 0 size: 486 MB
> >> node 0 free: 470 MB
> >> node 1 cpus: 4 5 6 7
> >> node 1 size: 424 MB
> >> node 1 free: 408 MB
> >> node distances:
> >> node   0   1
> >>   0:  10  20
> >>   1:  20  10
> >> # numactl -show
> >> policy: default
> >> preferred node: current
> >> physcpubind: 0 1 2 3 4 5 6 7
> >> cpubind: 0 1
> >> nodebind: 0 1
> >> membind: 0 1
> >>
> >> The patches are also available at
> >> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5
> >>
> >> For RISC-V, the following qemu series is a pre-requisite(already available in upstream)
> >> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313
> >>
> >> Testing:
> >> RISC-V:
> >> Tested in Qemu and 2 socket OmniXtend FPGA.
> >>
> >> ARM64:
> >> 2 socket kunpeng920 (4 nodes around 250G a node)
> >> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >>
> >> Changes from v4->v5:
> >> 1. Added by Acked-by & Reviewed-by tags.
> >> 2. Swapped patch 1 & 2 in v4 version.
> >>
> >> Changes from v3->v4:
> >> 1. Removed redundant duplicate header.
> >> 2. Added Reviewed-by tags.
> >>
> >> Changes from v2->v3:
> >> 1. Added Acked-by/Reviewed-by tags.
> >> 2. Replaced asm/acpi.h with linux/acpi.h
> >> 3. Defined arch_acpi_numa_init as static.
> >>
> >> Changes from v1->v2:
> >> 1. Replaced ARM64 specific compile time protection with ACPI specific ones.
> >> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V.
> >> 3. Fixed few typos.
> >>
> >> Atish Patra (4):
> >> arm64, numa: Change the numa init functions name to be generic
> >> numa: Move numa implementation to common code
> >> riscv: Separate memory init from paging init
> >> riscv: Add numa support for riscv64 platform
> >>
> >> Greentime Hu (1):
> >> riscv: Add support pte_protnone and pmd_protnone if
> >> CONFIG_NUMA_BALANCING
> >>
> >> arch/arm64/Kconfig                            |  1 +
> >> arch/arm64/include/asm/numa.h                 | 48 +----------------
> >> arch/arm64/kernel/acpi_numa.c                 | 12 -----
> >> arch/arm64/mm/Makefile                        |  1 -
> >> arch/arm64/mm/init.c                          |  4 +-
> >> arch/riscv/Kconfig                            | 31 ++++++++++-
> >> arch/riscv/include/asm/mmzone.h               | 13 +++++
> >> arch/riscv/include/asm/numa.h                 |  8 +++
> >> arch/riscv/include/asm/pci.h                  | 14 +++++
> >> arch/riscv/include/asm/pgtable.h              | 21 ++++++++
> >> arch/riscv/kernel/setup.c                     | 11 +++-
> >> arch/riscv/kernel/smpboot.c                   | 12 ++++-
> >> arch/riscv/mm/init.c                          | 10 +++-
> >> drivers/base/Kconfig                          |  6 +++
> >> drivers/base/Makefile                         |  1 +
> >> .../mm/numa.c => drivers/base/arch_numa.c     | 27 ++++++++--
> >> include/asm-generic/numa.h                    | 52 +++++++++++++++++++
> >> 17 files changed, 200 insertions(+), 72 deletions(-)
> >> create mode 100644 arch/riscv/include/asm/mmzone.h
> >> create mode 100644 arch/riscv/include/asm/numa.h
> >> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%)
> >> create mode 100644 include/asm-generic/numa.h
> >>
> >> --
> >> 2.25.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> >
> > Hey Palmer,
> > I did not see this series in for-next. Let me know if you need
> > anything else to be done for this series.
>
> Sorry about that.  It's on for-next, with Randy's comment addressed.  There was
> one merge conflict: we don't have resource_init() in for-next yet (which I
> think means I missed something else).

resource_init is changed to init_resource and moved to setup.c in the
following patch which was merged in 5.11 MW.
00ab027a3b82 RISC-V: Add kernel image sections to the resource tree

IDK if that's necessary for the NUMA
> stuff, I just dropped it.  I haven't tested this yet.



-- 
Regards,
Atish

Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V

[Palmer Dabbelt]

On Mon, 11 Jan 2021 11:31:11 PST (-0800), atishp@atishpatra.org wrote:
> On Sat, Jan 9, 2021 at 12:51 PM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>>
>> On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote:
>> > On Wed, Nov 18, 2020 at 4:39 PM Atish Patra <atish.patra@wdc.com> wrote:
>> >>
>> >> This series attempts to move the ARM64 numa implementation to common
>> >> code so that RISC-V can leverage that as well instead of reimplementing
>> >> it again.
>> >>
>> >> RISC-V specific bits are based on initial work done by Greentime Hu [1] but
>> >> modified to reuse the common implementation to avoid duplication.
>> >>
>> >> [1] https://lkml.org/lkml/2020/1/10/233
>> >>
>> >> This series has been tested on qemu with numa enabled for both RISC-V & ARM64.
>> >> It would be great if somebody can test it on numa capable ARM64 hardware platforms.
>> >> This patch series doesn't modify the maintainers list for the common code (arch_numa)
>> >> as I am not sure if somebody from ARM64 community or Greg should take up the
>> >> maintainership. Ganapatrao was the original author of the arm64 version.
>> >> I would be happy to update that in the next revision once it is decided.
>> >>
>> >> # numactl --hardware
>> >> available: 2 nodes (0-1)
>> >> node 0 cpus: 0 1 2 3
>> >> node 0 size: 486 MB
>> >> node 0 free: 470 MB
>> >> node 1 cpus: 4 5 6 7
>> >> node 1 size: 424 MB
>> >> node 1 free: 408 MB
>> >> node distances:
>> >> node   0   1
>> >>   0:  10  20
>> >>   1:  20  10
>> >> # numactl -show
>> >> policy: default
>> >> preferred node: current
>> >> physcpubind: 0 1 2 3 4 5 6 7
>> >> cpubind: 0 1
>> >> nodebind: 0 1
>> >> membind: 0 1
>> >>
>> >> The patches are also available at
>> >> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5
>> >>
>> >> For RISC-V, the following qemu series is a pre-requisite(already available in upstream)
>> >> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313
>> >>
>> >> Testing:
>> >> RISC-V:
>> >> Tested in Qemu and 2 socket OmniXtend FPGA.
>> >>
>> >> ARM64:
>> >> 2 socket kunpeng920 (4 nodes around 250G a node)
>> >> Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> >>
>> >> Changes from v4->v5:
>> >> 1. Added by Acked-by & Reviewed-by tags.
>> >> 2. Swapped patch 1 & 2 in v4 version.
>> >>
>> >> Changes from v3->v4:
>> >> 1. Removed redundant duplicate header.
>> >> 2. Added Reviewed-by tags.
>> >>
>> >> Changes from v2->v3:
>> >> 1. Added Acked-by/Reviewed-by tags.
>> >> 2. Replaced asm/acpi.h with linux/acpi.h
>> >> 3. Defined arch_acpi_numa_init as static.
>> >>
>> >> Changes from v1->v2:
>> >> 1. Replaced ARM64 specific compile time protection with ACPI specific ones.
>> >> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V.
>> >> 3. Fixed few typos.
>> >>
>> >> Atish Patra (4):
>> >> arm64, numa: Change the numa init functions name to be generic
>> >> numa: Move numa implementation to common code
>> >> riscv: Separate memory init from paging init
>> >> riscv: Add numa support for riscv64 platform
>> >>
>> >> Greentime Hu (1):
>> >> riscv: Add support pte_protnone and pmd_protnone if
>> >> CONFIG_NUMA_BALANCING
>> >>
>> >> arch/arm64/Kconfig                            |  1 +
>> >> arch/arm64/include/asm/numa.h                 | 48 +----------------
>> >> arch/arm64/kernel/acpi_numa.c                 | 12 -----
>> >> arch/arm64/mm/Makefile                        |  1 -
>> >> arch/arm64/mm/init.c                          |  4 +-
>> >> arch/riscv/Kconfig                            | 31 ++++++++++-
>> >> arch/riscv/include/asm/mmzone.h               | 13 +++++
>> >> arch/riscv/include/asm/numa.h                 |  8 +++
>> >> arch/riscv/include/asm/pci.h                  | 14 +++++
>> >> arch/riscv/include/asm/pgtable.h              | 21 ++++++++
>> >> arch/riscv/kernel/setup.c                     | 11 +++-
>> >> arch/riscv/kernel/smpboot.c                   | 12 ++++-
>> >> arch/riscv/mm/init.c                          | 10 +++-
>> >> drivers/base/Kconfig                          |  6 +++
>> >> drivers/base/Makefile                         |  1 +
>> >> .../mm/numa.c => drivers/base/arch_numa.c     | 27 ++++++++--
>> >> include/asm-generic/numa.h                    | 52 +++++++++++++++++++
>> >> 17 files changed, 200 insertions(+), 72 deletions(-)
>> >> create mode 100644 arch/riscv/include/asm/mmzone.h
>> >> create mode 100644 arch/riscv/include/asm/numa.h
>> >> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%)
>> >> create mode 100644 include/asm-generic/numa.h
>> >>
>> >> --
>> >> 2.25.1
>> >>
>> >>
>> >> _______________________________________________
>> >> linux-riscv mailing list
>> >> linux-riscv@lists.infradead.org
>> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>> >
>> > Hey Palmer,
>> > I did not see this series in for-next. Let me know if you need
>> > anything else to be done for this series.
>>
>> Sorry about that.  It's on for-next, with Randy's comment addressed.  There was
>> one merge conflict: we don't have resource_init() in for-next yet (which I
>> think means I missed something else).
>
> resource_init is changed to init_resource and moved to setup.c in the
> following patch which was merged in 5.11 MW.
> 00ab027a3b82 RISC-V: Add kernel image sections to the resource tree

Ah, great, for some reason I thought we hadn't merged those yet.

>> IDK if that's necessary for the NUMA
>> stuff, I just dropped it.  I haven't tested this yet.

Re: [PATCH v5 3/5] riscv: Separate memory init from paging init

[Geert Uytterhoeven]

Hi Atish,

On Thu, Nov 19, 2020 at 1:40 AM Atish Patra <atish.patra@wdc.com> wrote:
> Currently, we perform some memory init functions in paging init. But,
> that will be an issue for NUMA support where DT needs to be flattened
> before numa initialization and memblock_present can only be called
> after numa initialization.
>
> Move memory initialization related functions to a separate function.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> Reviewed-by: Anup Patel <anup@brainfault.org>
> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>

This is now commit cbd34f4bb37d62d8 in v5.12-rc1, breaking the boot on
Vexriscv:

[    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
[    0.000000] printk: bootconsole [sbi0] enabled
[    0.000000] printk: debug: ignoring loglevel setting.
[    0.000000] Initial ramdisk at: 0x(ptrval) (8388608 bytes)
[    0.000000] Unable to handle kernel paging request at virtual
address c8000008
[    0.000000] Oops [#1]
[    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted
5.11.0-orangecrab-00023-g7c4fc8e3e982 #129
[    0.000000] epc: c04d6624 ra : c04d6524 sp : c05ddf70
[    0.000000]  gp : c0678bc0 tp : c05e5b40 t0 : c8000000
[    0.000000]  t1 : 00030000 t2 : ffffffff s0 : c05ddfc0
[    0.000000]  s1 : c8000000 a0 : 00000000 a1 : c7ffffe0
[    0.000000]  a2 : 00000005 a3 : 00000001 a4 : 0000000c
[    0.000000]  a5 : 00000000 a6 : c04fe000 a7 : 0000000c
[    0.000000]  s2 : c04fe098 s3 : 000000a0 s4 : c7ffff60
[    0.000000]  s5 : c04fe0dc s6 : 80000200 s7 : c059f19c
[    0.000000]  s8 : 81000200 s9 : c059f1b8 s10: 80000200
[    0.000000]  s11: c059f19c t3 : 405dba80 t4 : c05e6f08
[    0.000000]  t5 : 81000200 t6 : 40501000
[    0.000000] status: 00000100 badaddr: c8000008 cause: 0000000f
[    0.000000] random: get_random_bytes called from
print_oops_end_marker+0x38/0x7c with crng_init=0
[    0.000000] ---[ end trace 0000000000000000 ]---
[    0.000000] Kernel panic - not syncing: Attempted to kill the idle task!

Note that I have "[PATCH v2 3/4] RISC-V: Fix L1_CACHE_BYTES for RV32"[1]
applied, to avoid another crash (7c4fc8e3e982 = v5.11 + [1] +
cherry-picked commits from the riscv-for-linus-5.12-mw0 pull request).

If I revert the L1_CACHE_BYTES change, the boot continues, but I'm back
to the old issue fixed by [1]:

[   22.126687] Freeing initrd memory: 8192K
[   22.321811] workingset: timestamp_bits=30 max_order=15 bucket_order=0
[   29.001509] Block layer SCSI generic (bsg) driver version 0.4
loaded (major 253)
[   29.021555] io scheduler mq-deadline registered
[   29.033692] io scheduler kyber registered
[   29.141294] Unable to handle kernel paging request at virtual
address 69726573
[   29.158523] Oops [#1]
[   29.162232] CPU: 0 PID: 1 Comm: swapper Not tainted
5.11.0-orangecrab-00023-g7c4fc8e3e982-dirty #132
[   29.171970] epc: c000d3b0 ra : c000eb74 sp : c182dca0
[   29.178786]  gp : c067aee0 tp : c1830000 t0 : c18d75e0
[   29.185935]  t1 : 00030000 t2 : 00000000 s0 : c182dcb0
[   29.193028]  s1 : 00000000 a0 : c05eab14 a1 : c18d75c0
[   29.200067]  a2 : c7ffe384 a3 : 69726573 a4 : f000000b
[   29.207095]  a5 : f0000000 a6 : c7fffff8 a7 : 00000000
[   29.214141]  s2 : 01001f00 s3 : c05eb000 s4 : c067c000
[   29.221171]  s5 : c000ec0c s6 : 80000000 s7 : c05eaad4
[   29.228200]  s8 : c05eab58 s9 : c05a1000 s10: c18d75c0
[   29.235238]  s11: c05eab14 t3 : 20b9a6cc t4 : 00000001
[   29.242277]  t5 : 00000000 t6 : c188cd50
[   29.247588] status: 00000120 badaddr: 69726573 cause: 0000000d
[   29.274424] ---[ end trace 69dee1b9ca96f1d6 ]---
[   29.282859] note: swapper[1] exited with preempt_count 1
[   29.293156] Kernel panic - not syncing: Attempted to kill init!
exitcode=0x0000000b

[1] https://lore.kernel.org/linux-riscv/20210111234504.3782179-4-atish.patra@wdc.com/

Will have a deeper look later...

Thanks for any suggestions!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v5 3/5] riscv: Separate memory init from paging init

[Geert Uytterhoeven]

Hi Atish,

On Wed, Mar 10, 2021 at 5:41 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Thu, Nov 19, 2020 at 1:40 AM Atish Patra <atish.patra@wdc.com> wrote:
> > Currently, we perform some memory init functions in paging init. But,
> > that will be an issue for NUMA support where DT needs to be flattened
> > before numa initialization and memblock_present can only be called
> > after numa initialization.
> >
> > Move memory initialization related functions to a separate function.
> >
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> > Reviewed-by: Anup Patel <anup@brainfault.org>
> > Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
>
> This is now commit cbd34f4bb37d62d8 in v5.12-rc1, breaking the boot on
> Vexriscv:
>
> [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
> [    0.000000] printk: bootconsole [sbi0] enabled
> [    0.000000] printk: debug: ignoring loglevel setting.
> [    0.000000] Initial ramdisk at: 0x(ptrval) (8388608 bytes)
> [    0.000000] Unable to handle kernel paging request at virtual
> address c8000008

> Note that I have "[PATCH v2 3/4] RISC-V: Fix L1_CACHE_BYTES for RV32"[1]
> applied, to avoid another crash (7c4fc8e3e982 = v5.11 + [1] +
> cherry-picked commits from the riscv-for-linus-5.12-mw0 pull request).
>
> If I revert the L1_CACHE_BYTES change, the boot continues, but I'm back
> to the old issue fixed by [1]:
>
> [   22.126687] Freeing initrd memory: 8192K
> [   22.321811] workingset: timestamp_bits=30 max_order=15 bucket_order=0
> [   29.001509] Block layer SCSI generic (bsg) driver version 0.4
> loaded (major 253)
> [   29.021555] io scheduler mq-deadline registered
> [   29.033692] io scheduler kyber registered
> [   29.141294] Unable to handle kernel paging request at virtual
> address 69726573

> Will have a deeper look later...

I found the core issue, and sent a fix: "[PATCH] RISC-V: Fix
out-of-bounds accesses in init_resources()"
https://lore.kernel.org/linux-riscv/20210312154634.3541844-1-geert@linux-m68k.org/

It works now with either value of L1_CACHE_SHIFT, so patch "[PATCH v2
3/4] RISC-V: Fix L1_CACHE_BYTES for RV32" is no longer needed.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds