From: Steen Hegelund <steen.hegelund@microchip.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Lars Povlsen <lars.povlsen@microchip.com>,
Bjarni Jonasson <bjarni.jonasson@microchip.com>,
Microsemi List <microsemi@lists.bootlin.com>,
Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/4] phy: Add ethernet serdes configuration option
Date: Thu, 19 Nov 2020 16:59:16 +0100 [thread overview]
Message-ID: <20201119155916.ies46qesbp7e32gk@mchp-dev-shegelun> (raw)
In-Reply-To: <20201119144359.y5scnscmb7nvptnv@mchp-dev-shegelun>
On 19.11.2020 15:43, Steen Hegelund wrote:
>On 19.11.2020 11:37, Vinod Koul wrote:
>>EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>>On 10-11-20, 15:49, Steen Hegelund wrote:
>>>Provide a new ethernet phy configuration structure, that
>>>allow PHYs used for ethernet to be configured with
>>>speed, media type and clock information.
>>>
>>>Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>>>Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
>>>---
>>> include/linux/phy/phy-ethernet-serdes.h | 49 +++++++++++++++++++++++++
>>> include/linux/phy/phy.h | 4 ++
>>> 2 files changed, 53 insertions(+)
>>> create mode 100644 include/linux/phy/phy-ethernet-serdes.h
>>>
>>>diff --git a/include/linux/phy/phy-ethernet-serdes.h b/include/linux/phy/phy-ethernet-serdes.h
>>>new file mode 100644
>>>index 000000000000..04f496855b00
>>>--- /dev/null
>>>+++ b/include/linux/phy/phy-ethernet-serdes.h
>>>@@ -0,0 +1,49 @@
>>>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
>>>+/*
>>>+ * Microchip Sparx5 Ethernet SerDes driver
>>>+ *
>>>+ * Copyright (c) 2020 Microschip Inc
>>>+ */
>>>+#ifndef __PHY_ETHERNET_SERDES_H_
>>>+#define __PHY_ETHERNET_SERDES_H_
>>>+
>>>+#include <linux/phy.h>
>>>+
>>>+enum ethernet_media_type {
>>>+ ETH_MEDIA_DEFAULT,
>>>+ ETH_MEDIA_SR,
>>>+ ETH_MEDIA_DAC,
>>>+};
>>>+
>>>+/**
>>>+ * struct phy_configure_opts_eth_serdes - Ethernet SerDes
>>>+ *
>>>+ * This structure is used to represent the configuration state of a
>>>+ * Ethernet Serdes PHY.
>>>+ */
>>>+struct phy_configure_opts_eth_serdes {
>>>+ /**
>>>+ * @speed
>>>+ *
>>>+ * Speed of the serdes interface in Mbps
>>>+ */
>>
>>Can we have this in kernel-doc style pls
>>
>I will update the documentation.
>>>+ u32 speed;
>>>+
>>>+ /**
>>>+ * @media_type
>>>+ *
>>>+ * Specifies which media the serdes will be using
>>>+ */
>>>+ enum ethernet_media_type media_type;
>>>+
>>>+ /**
>>>+ * @clk
>>>+ *
>>>+ * Specifies the serdes clock in MHz
>>>+ * Default: 0 will provide the highest supported clock.
>>>+ */
>>>+ u32 clk;
>>
>>Why not use std clk interface for this..?
>
>I am not familiar with that. Is that the max_link_rate in struct phy_attrs?
Now I get it: A DT clock node referred by the SerDes: Yes that should be
possible. I will try that out...
>
>>
>>>+};
>>>+
>>>+#endif
>>>+
>>>diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
>>>index e435bdb0bab3..78ecb375cede 100644
>>>--- a/include/linux/phy/phy.h
>>>+++ b/include/linux/phy/phy.h
>>>@@ -18,6 +18,7 @@
>>>
>>> #include <linux/phy/phy-dp.h>
>>> #include <linux/phy/phy-mipi-dphy.h>
>>>+#include <linux/phy/phy-ethernet-serdes.h>
>>>
>>> struct phy;
>>>
>>>@@ -49,11 +50,14 @@ enum phy_mode {
>>> *
>>> * @mipi_dphy: Configuration set applicable for phys supporting
>>> * the MIPI_DPHY phy mode.
>>>+ * @eth_serdes: Configuration set applicable for phys supporting
>>>+ * the ethernet serdes.
>>> * @dp: Configuration set applicable for phys supporting
>>> * the DisplayPort protocol.
>>> */
>>> union phy_configure_opts {
>>> struct phy_configure_opts_mipi_dphy mipi_dphy;
>>>+ struct phy_configure_opts_eth_serdes eth_serdes;
>>
>>Kishon, does this look okay for you..?
>>
>>> struct phy_configure_opts_dp dp;
>>> };
>>>
>>>--
>>>2.29.2
>>
>>--
>>~Vinod
>
>BR
>Steen
>
>---------------------------------------
>Steen Hegelund
>steen.hegelund@microchip.com
BR
Steen
---------------------------------------
Steen Hegelund
steen.hegelund@microchip.com
next prev parent reply other threads:[~2020-11-19 15:59 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-10 14:49 [PATCH v2 0/4] Adding the Sparx5 Serdes driver Steen Hegelund
2020-11-10 14:49 ` [PATCH v2 1/4] dt-bindings: phy: Add sparx5-serdes bindings Steen Hegelund
2020-11-19 5:58 ` Vinod Koul
2020-11-19 16:02 ` Steen Hegelund
2020-11-10 14:49 ` [PATCH v2 2/4] phy: Add ethernet serdes configuration option Steen Hegelund
2020-11-19 6:07 ` Vinod Koul
2020-11-19 14:43 ` Steen Hegelund
2020-11-19 15:59 ` Steen Hegelund [this message]
2020-11-10 14:49 ` [PATCH v2 3/4] phy: Add Sparx5 ethernet serdes PHY driver Steen Hegelund
2020-11-19 6:14 ` Vinod Koul
2020-11-19 14:33 ` Steen Hegelund
2020-11-10 14:49 ` [PATCH v2 4/4] arm64: dts: sparx5: Add Sparx5 serdes driver node Steen Hegelund
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