From: Maxime Ripard <maxime@cerno.tech>
To: fuyao@allwinnertech.com
Cc: wens@csie.org, linux-remoteproc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] introduce sunxi hwspinlock
Date: Fri, 20 Nov 2020 17:07:10 +0100 [thread overview]
Message-ID: <20201120160710.wlkl5cdfqlrym2fj@gilmour> (raw)
In-Reply-To: <cover.1605767679.git.fuyao@allwinnertech.com>
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Hi!
On Thu, Nov 19, 2020 at 02:44:51PM +0800, fuyao@allwinnertech.com wrote:
> From: fuyao <fuyao@allwinnertech.com>
>
> this series add hwspinlock of sunxi. it provides hardware assistance for
> synchronization between the multiple processors in the system.
> (Or1k, Cortex-A7, Cortex-A53, Xtensa)
Xtensa? Which SoC has an Xtensa core?
Unfortunately, there's been a submission of the same driver earlier this week:
https://lore.kernel.org/lkml/cover.1605693132.git.wilken.gottwalt@posteo.net/
It would be great if you could point out whatever issue there is with
that patch series (it looks like the retry delay could be useful for
example).
Thanks!
Maxime
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next prev parent reply other threads:[~2020-11-20 16:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-19 6:44 [PATCH 0/2] introduce sunxi hwspinlock fuyao
2020-11-19 6:44 ` [PATCH 1/2] dt-bindings: hwlock: add sunxi hwlock fuyao
2020-11-19 6:44 ` [PATCH 2/2] hwspinlock: add SUNXI implementation fuyao
2020-11-21 4:01 ` Bjorn Andersson
2020-11-21 14:33 ` fuyao
2020-11-20 16:07 ` Maxime Ripard [this message]
2020-11-21 14:08 ` [PATCH 0/2] introduce sunxi hwspinlock fuyao
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