From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F392AC2D0E4 for ; Mon, 23 Nov 2020 06:54:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A5D6E207FF for ; Mon, 23 Nov 2020 06:54:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727450AbgKWGyt (ORCPT ); Mon, 23 Nov 2020 01:54:49 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:7717 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725275AbgKWGyt (ORCPT ); Mon, 23 Nov 2020 01:54:49 -0500 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4CfdDZ2yJ4zkdlm; Mon, 23 Nov 2020 14:54:22 +0800 (CST) Received: from DESKTOP-7FEPK9S.china.huawei.com (10.174.187.74) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Mon, 23 Nov 2020 14:54:40 +0800 From: Shenming Lu To: Marc Zyngier , James Morse , "Julien Thierry" , Suzuki K Poulose , Eric Auger , , , , , Christoffer Dall CC: Alex Williamson , Kirti Wankhede , Cornelia Huck , Neo Jia , , , Subject: [RFC PATCH v1 1/4] irqchip/gic-v4.1: Plumb get_irqchip_state VLPI callback Date: Mon, 23 Nov 2020 14:54:07 +0800 Message-ID: <20201123065410.1915-2-lushenming@huawei.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20201123065410.1915-1-lushenming@huawei.com> References: <20201123065410.1915-1-lushenming@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.187.74] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zenghui Yu Up to now, the irq_get_irqchip_state() callback of its_irq_chip leaves unimplemented since there is no architectural way to get the VLPI's pending state before GICv4.1. Yeah, there has one in v4.1 for VLPIs. With GICv4.1, after unmapping the vPE, which cleans and invalidates any caching of the VPT, we can get the VLPI's pending state by peeking at the VPT. So we implement the irq_get_irqchip_state() callback of its_irq_chip to do it. Signed-off-by: Zenghui Yu Signed-off-by: Shenming Lu --- drivers/irqchip/irq-gic-v3-its.c | 38 ++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 0fec31931e11..287003cacac7 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1695,6 +1695,43 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); } +static bool its_peek_vpt(struct its_vpe *vpe, irq_hw_number_t hwirq) +{ + int mask = hwirq % BITS_PER_BYTE; + void *va; + u8 *pt; + + va = page_address(vpe->vpt_page); + pt = va + hwirq / BITS_PER_BYTE; + + return !!(*pt & (1U << mask)); +} + +static int its_irq_get_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, bool *val) +{ + struct its_device *its_dev = irq_data_get_irq_chip_data(d); + struct its_vlpi_map *map = get_vlpi_map(d); + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + /* not intended for physical LPI's pending state */ + if (!map) + return -EINVAL; + + /* + * In GICv4.1, a VMAPP with {V,Alloc}=={0,1} cleans and invalidates + * any caching of the VPT associated with the vPEID held in the GIC. + */ + if (!is_v4_1(its_dev->its) || atomic_read(&map->vpe->vmapp_count)) + return -EACCES; + + *val = its_peek_vpt(map->vpe, map->vintid); + + return 0; +} + static int its_irq_set_irqchip_state(struct irq_data *d, enum irqchip_irq_state which, bool state) @@ -1975,6 +2012,7 @@ static struct irq_chip its_irq_chip = { .irq_eoi = irq_chip_eoi_parent, .irq_set_affinity = its_set_affinity, .irq_compose_msi_msg = its_irq_compose_msi_msg, + .irq_get_irqchip_state = its_irq_get_irqchip_state, .irq_set_irqchip_state = its_irq_set_irqchip_state, .irq_retrigger = its_irq_retrigger, .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, -- 2.23.0