From: "Ramuthevar,Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: broonie@kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org
Cc: linux-mtd@lists.infradead.org, vigneshr@ti.com, p.yadav@ti.com,
cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
Ramuthevar Vadivel Murugan
<vadivel.muruganx.ramuthevar@linux.intel.com>
Subject: [PATCH v9 3/5] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
Date: Tue, 24 Nov 2020 12:18:38 +0800 [thread overview]
Message-ID: <20201124041840.31066-4-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)
In-Reply-To: <20201124041840.31066-1-vadivel.muruganx.ramuthevar@linux.intel.com>
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
drivers/spi/spi-cadence-quadspi.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index d12b765e87be..c7ecd6d44326 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -75,6 +75,7 @@ struct cqspi_st {
bool is_decoded_cs;
u32 fifo_depth;
u32 fifo_width;
+ u32 num_chipselect;
bool rclk_en;
u32 trigger_address;
u32 wr_delay;
@@ -1070,6 +1071,9 @@ static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
return -ENXIO;
}
+ if (of_property_read_u32(np, "num-cs", &cqspi->num_chipselect))
+ cqspi->num_chipselect = CQSPI_MAX_CHIPSELECT;
+
cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en");
return 0;
@@ -1302,6 +1306,8 @@ static int cqspi_probe(struct platform_device *pdev)
cqspi->current_cs = -1;
cqspi->sclk = 0;
+ master->num_chipselect = cqspi->num_chipselect;
+
ret = cqspi_setup_flash(cqspi);
if (ret) {
dev_err(dev, "failed to setup flash parameters %d\n", ret);
--
2.11.0
next prev parent reply other threads:[~2020-11-24 4:19 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-24 4:18 [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-24 4:18 ` [PATCH v9 1/5] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-11-24 4:18 ` [PATCH v9 2/5] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-11-24 4:18 ` Ramuthevar,Vadivel MuruganX [this message]
2020-11-24 4:18 ` [PATCH v9 4/5] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-11-24 4:18 ` [PATCH v9 5/5] dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi Ramuthevar,Vadivel MuruganX
2021-01-13 15:28 ` [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Mark Brown
2021-01-14 3:35 ` Kim, Cheol Yong
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