From: Sudeep Holla <sudeep.holla@arm.com>
To: David Brazdil <dbrazdil@google.com>
Cc: kvmarm@lists.cs.columbia.edu, Jonathan Corbet <corbet@lwn.net>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Dennis Zhou <dennis@kernel.org>, Tejun Heo <tj@kernel.org>,
Christoph Lameter <cl@linux.com>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com
Subject: Re: [PATCH v3 19/23] kvm: arm64: Intercept host's CPU_ON SMCs
Date: Fri, 27 Nov 2020 17:47:26 +0000 [thread overview]
Message-ID: <20201127174726.4b6azdyzn5j6qmao@bogus> (raw)
In-Reply-To: <20201126155421.14901-20-dbrazdil@google.com>
On Thu, Nov 26, 2020 at 03:54:17PM +0000, David Brazdil wrote:
> Add a handler of the CPU_ON PSCI call from host. When invoked, it looks
> up the logical CPU ID corresponding to the provided MPIDR and populates
> the state struct of the target CPU with the provided x0, pc. It then
> calls CPU_ON itself, with an entry point in hyp that initializes EL2
> state before returning ERET to the provided PC in EL1.
>
> There is a simple atomic lock around the boot args struct. If it is
> already locked, CPU_ON will return PENDING_ON error code.
>
> Signed-off-by: David Brazdil <dbrazdil@google.com>
> ---
> arch/arm64/kvm/hyp/nvhe/hyp-init.S | 30 ++++++++
> arch/arm64/kvm/hyp/nvhe/psci-relay.c | 109 +++++++++++++++++++++++++++
> 2 files changed, 139 insertions(+)
>
> diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> index 98ce40e17b42..ea71f653af55 100644
> --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> @@ -9,6 +9,7 @@
>
> #include <asm/alternative.h>
> #include <asm/assembler.h>
> +#include <asm/el2_setup.h>
> #include <asm/kvm_arm.h>
> #include <asm/kvm_asm.h>
> #include <asm/kvm_mmu.h>
> @@ -161,6 +162,35 @@ alternative_else_nop_endif
> ret
> SYM_CODE_END(___kvm_hyp_init)
>
> +SYM_CODE_START(__kvm_hyp_cpu_on_entry)
> + msr SPsel, #1 // We want to use SP_EL{1,2}
> +
> + /* Check that the core was booted in EL2. */
> + mrs x1, CurrentEL
> + cmp x1, #CurrentEL_EL2
> + b.eq 2f
> +
> + /* The core booted in EL1. KVM cannot be initialized on it. */
> +1: wfe
> + wfi
> + b 1b
> +
> + /* Initialize EL2 CPU state to sane values. */
> +2: mov x29, x0
> + init_el2_state nvhe
> + mov x0, x29
> +
> + /* Enable MMU, set vectors and stack. */
> + bl ___kvm_hyp_init
> +
> + /* Load address of the C handler. */
> + ldr x1, =__kvm_hyp_psci_cpu_entry
> + kimg_hyp_va x1, x2
> +
> + /* Leave idmap. */
> + br x1
> +SYM_CODE_END(__kvm_hyp_cpu_on_entry)
> +
> SYM_CODE_START(__kvm_handle_stub_hvc)
> cmp x0, #HVC_SOFT_RESTART
> b.ne 1f
> diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
> index 7aa87ab7f5ce..39e507672e6e 100644
> --- a/arch/arm64/kvm/hyp/nvhe/psci-relay.c
> +++ b/arch/arm64/kvm/hyp/nvhe/psci-relay.c
> @@ -9,12 +9,17 @@
> #include <asm/kvm_mmu.h>
> #include <kvm/arm_hypercalls.h>
> #include <linux/arm-smccc.h>
> +#include <linux/kvm_host.h>
> #include <linux/psci.h>
> #include <kvm/arm_psci.h>
> #include <uapi/linux/psci.h>
>
> #include <nvhe/trap_handler.h>
>
> +extern char __kvm_hyp_cpu_on_entry[];
> +
> +void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
> +
> /* Config options set by the host. */
> u32 __ro_after_init kvm_host_psci_version;
> u32 __ro_after_init kvm_host_psci_function_id[PSCI_FN_MAX];
> @@ -22,6 +27,19 @@ s64 __ro_after_init hyp_physvirt_offset;
>
> #define __hyp_pa(x) ((phys_addr_t)((x)) + hyp_physvirt_offset)
>
> +#define INVALID_CPU_ID UINT_MAX
> +
> +#define CPU_UNLOCKED 0
> +#define CPU_LOCKED 1
> +
> +struct cpu_boot_args {
> + unsigned long pc;
> + unsigned long r0;
> +};
> +
> +static DEFINE_PER_CPU(atomic_t, cpu_on_lock) = ATOMIC_INIT(0);
> +static DEFINE_PER_CPU(struct cpu_boot_args, cpu_on_args);
> +
> static u64 get_psci_func_id(struct kvm_cpu_context *host_ctxt)
> {
> DECLARE_REG(u64, func_id, host_ctxt, 0);
> @@ -78,10 +96,99 @@ static __noreturn unsigned long psci_forward_noreturn(struct kvm_cpu_context *ho
> hyp_panic(); /* unreachable */
> }
>
> +static unsigned int find_cpu_id(u64 mpidr)
> +{
> + unsigned int i;
> +
> + /* Reject invalid MPIDRs */
> + if (mpidr & ~MPIDR_HWID_BITMASK)
> + return INVALID_CPU_ID;
> +
> + for (i = 0; i < NR_CPUS; i++) {
I may not have understood the flow correctly, so just asking:
This is just called for secondaries on boot right ? And the cpumasks
are setup by then ? Just trying to see if we can use cpu_possible_mask
instead of running through all 256/1k/4k cpus(ofcourse based on NR_CPUS
config)
--
Regards,
Sudeep
next prev parent reply other threads:[~2020-11-27 17:47 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 15:53 [PATCH v3 00/23] Opt-in always-on nVHE hypervisor David Brazdil
2020-11-26 15:53 ` [PATCH v3 01/23] psci: Support psci_ops.get_version for v0.1 David Brazdil
2020-11-26 17:21 ` Mark Rutland
2020-11-26 15:54 ` [PATCH v3 02/23] psci: Accessor for configured PSCI function IDs David Brazdil
2020-11-26 17:24 ` Mark Rutland
2020-11-26 17:29 ` David Brazdil
2020-11-26 17:34 ` Lorenzo Pieralisi
2020-11-26 15:54 ` [PATCH v3 03/23] arm64: Make cpu_logical_map() take unsigned int David Brazdil
2020-11-26 17:28 ` Mark Rutland
2020-12-02 15:44 ` David Brazdil
2020-11-26 15:54 ` [PATCH v3 04/23] arm64: Move MAIR_EL1_SET to asm/memory.h David Brazdil
2020-11-26 17:35 ` Mark Rutland
2020-12-01 13:58 ` David Brazdil
2020-11-26 15:54 ` [PATCH v3 05/23] arm64: Extract parts of el2_setup into a macro David Brazdil
2020-11-26 18:06 ` Mark Rutland
2020-12-01 13:55 ` David Brazdil
2020-11-26 15:54 ` [PATCH v3 06/23] kvm: arm64: Add kvm-arm.protected early kernel parameter David Brazdil
2020-11-27 16:32 ` Sudeep Holla
2020-12-01 13:19 ` David Brazdil
2020-12-01 14:07 ` Mark Rutland
2020-12-01 14:43 ` David Brazdil
2020-12-01 14:58 ` Mark Rutland
2020-11-26 15:54 ` [PATCH v3 07/23] kvm: arm64: Initialize MAIR_EL2 using a constant David Brazdil
2020-11-26 15:54 ` [PATCH v3 08/23] kvm: arm64: Remove vector_ptr param of hyp-init David Brazdil
2020-11-26 15:54 ` [PATCH v3 09/23] kvm: arm64: Move hyp-init params to a per-CPU struct David Brazdil
2020-11-26 15:54 ` [PATCH v3 10/23] kvm: arm64: Add .hyp.data..ro_after_init ELF section David Brazdil
2020-11-26 15:54 ` [PATCH v3 11/23] kvm: arm64: Support per_cpu_ptr in nVHE hyp code David Brazdil
2020-11-26 15:54 ` [PATCH v3 12/23] kvm: arm64: Create nVHE copy of cpu_logical_map David Brazdil
2020-11-26 15:54 ` [PATCH v3 13/23] kvm: arm64: Add SMC handler in nVHE EL2 David Brazdil
2020-11-26 15:54 ` [PATCH v3 14/23] kvm: arm64: Bootstrap PSCI " David Brazdil
2020-11-26 15:54 ` [PATCH v3 15/23] kvm: arm64: Add offset for hyp VA <-> PA conversion David Brazdil
2020-11-26 15:54 ` [PATCH v3 16/23] kvm: arm64: Forward safe PSCI SMCs coming from host David Brazdil
2020-11-27 10:14 ` Lorenzo Pieralisi
2020-12-02 17:49 ` David Brazdil
2020-11-27 16:51 ` Sudeep Holla
2020-12-01 13:20 ` David Brazdil
2020-11-26 15:54 ` [PATCH v3 17/23] kvm: arm64: Extract __do_hyp_init into a helper function David Brazdil
2020-11-26 15:54 ` [PATCH v3 18/23] kvm: arm64: Add function to enter host from KVM nVHE hyp code David Brazdil
2020-11-26 15:54 ` [PATCH v3 19/23] kvm: arm64: Intercept host's CPU_ON SMCs David Brazdil
2020-11-27 17:47 ` Sudeep Holla [this message]
2020-12-01 13:51 ` David Brazdil
2020-11-26 15:54 ` [PATCH v3 20/23] kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs David Brazdil
2020-12-01 14:57 ` Mark Rutland
2020-11-26 15:54 ` [PATCH v3 21/23] kvm: arm64: Keep nVHE EL2 vector installed David Brazdil
2020-11-26 15:54 ` [PATCH v3 22/23] kvm: arm64: Trap host SMCs in protected mode David Brazdil
2020-11-26 15:54 ` [PATCH v3 23/23] kvm: arm64: Fix EL2 mode availability checks David Brazdil
2020-11-26 15:57 ` [PATCH v3 00/23] Opt-in always-on nVHE hypervisor Matthew Wilcox
2020-11-26 16:19 ` Marc Zyngier
2020-11-26 16:23 ` Matthew Wilcox
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201127174726.4b6azdyzn5j6qmao@bogus \
--to=sudeep.holla@arm.com \
--cc=catalin.marinas@arm.com \
--cc=cl@linux.com \
--cc=corbet@lwn.net \
--cc=dbrazdil@google.com \
--cc=dennis@kernel.org \
--cc=james.morse@arm.com \
--cc=julien.thierry.kdev@gmail.com \
--cc=kernel-team@android.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=suzuki.poulose@arm.com \
--cc=tj@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).