From: Steen Hegelund <steen.hegelund@microchip.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Lars Povlsen <lars.povlsen@microchip.com>,
Bjarni Jonasson <bjarni.jonasson@microchip.com>,
"Microchip Linux Driver Support" <UNGLinuxDriver@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Microsemi List <microsemi@lists.bootlin.com>,
<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 1/3] dt-bindings: net: sparx5: Add sparx5-switch bindings
Date: Mon, 30 Nov 2020 14:09:34 +0100 [thread overview]
Message-ID: <20201130130934.o47mdjiqidtznm2t@mchp-dev-shegelun> (raw)
In-Reply-To: <20201127170052.GV2073444@lunn.ch>
On 27.11.2020 18:00, Andrew Lunn wrote:
>EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
>> + reg-names:
>> + minItems: 153
>> + items:
>> + - const: dev2g5_0
>> + - const: dev5g_0
>> + - const: pcs5g_br_0
>> + - const: dev2g5_1
>> + - const: dev5g_1
>...
>> + - const: ana_ac
>> + - const: vop
>
>> + switch: switch@600000000 {
>> + compatible = "microchip,sparx5-switch";
>> + reg = <0x10004000 0x4000>, /* dev2g5_0 */
>> + <0x10008000 0x4000>, /* dev5g_0 */
>> + <0x1000c000 0x4000>, /* pcs5g_br_0 */
>> + <0x10010000 0x4000>, /* dev2g5_1 */
>> + <0x10014000 0x4000>, /* dev5g_1 */
>
>...
>
>> + <0x11800000 0x100000>, /* ana_l2 */
>> + <0x11900000 0x100000>, /* ana_ac */
>> + <0x11a00000 0x100000>; /* vop */
>
>This is a pretty unusual binding.
>
>Why is it not
>
>reg = <0x10004000 0x1af8000>
>
>and the driver can then break up the memory into its sub ranges?
>
> Andrew
Hi Andrew,
Since the targets used by the driver is not always in the natural
address order (e.g. the dev2g5_x targets), I thought it best to let the DT
take care of this since this cannot be probed. I am aware that this causes
extra mappings compared to the one-range strategy, but this layout seems more
transparent to me, also when mapped over PCIe.
BR
Steen
---------------------------------------
Steen Hegelund
steen.hegelund@microchip.com
next prev parent reply other threads:[~2020-11-30 13:10 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-27 13:33 [RFC PATCH 0/3] net: Adding the Sparx5 Switch Driver Steen Hegelund
2020-11-27 13:33 ` [RFC PATCH 1/3] dt-bindings: net: sparx5: Add sparx5-switch bindings Steen Hegelund
2020-11-27 17:00 ` Andrew Lunn
2020-11-30 13:09 ` Steen Hegelund [this message]
2020-11-30 14:05 ` Andrew Lunn
2020-11-30 15:33 ` Steen Hegelund
2020-11-27 13:33 ` [RFC PATCH 2/3] net: sparx5: Add Sparx5 switchdev driver Steen Hegelund
2020-11-27 17:15 ` Andrew Lunn
2020-11-30 13:13 ` Steen Hegelund
2020-12-07 13:33 ` Jiri Pirko
2020-11-28 18:45 ` Andrew Lunn
2020-11-30 13:17 ` Steen Hegelund
2020-11-28 19:03 ` Andrew Lunn
2020-11-30 13:28 ` Steen Hegelund
2020-11-30 15:34 ` Andrew Lunn
2020-11-28 19:06 ` Andrew Lunn
2020-11-28 19:37 ` Russell King - ARM Linux admin
2020-11-28 20:07 ` Alexandre Belloni
2020-11-28 20:21 ` Andrew Lunn
2020-11-28 22:28 ` Russell King - ARM Linux admin
2020-11-29 10:52 ` Russell King - ARM Linux admin
2020-11-29 11:28 ` Russell King - ARM Linux admin
2020-11-30 14:39 ` Steen Hegelund
2020-11-30 14:54 ` Russell King - ARM Linux admin
2020-11-29 11:30 ` Russell King - ARM Linux admin
2020-11-30 14:30 ` Steen Hegelund
2020-11-30 14:50 ` Russell King - ARM Linux admin
2020-11-30 14:15 ` Steen Hegelund
2020-11-30 14:52 ` Russell King - ARM Linux admin
2020-11-30 14:10 ` Steen Hegelund
2020-11-28 19:24 ` Andrew Lunn
2020-12-01 11:11 ` Lars Povlsen
2020-11-29 17:16 ` Andrew Lunn
2020-11-30 13:33 ` Steen Hegelund
2020-11-29 17:26 ` Andrew Lunn
2020-11-30 13:31 ` Steen Hegelund
2020-11-29 17:35 ` Andrew Lunn
2020-11-30 14:42 ` Steen Hegelund
2020-11-27 13:33 ` [RFC PATCH 3/3] arm64: dts: sparx5: Add the Sparx5 switch node Steen Hegelund
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201130130934.o47mdjiqidtznm2t@mchp-dev-shegelun \
--to=steen.hegelund@microchip.com \
--cc=UNGLinuxDriver@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=andrew@lunn.ch \
--cc=bjarni.jonasson@microchip.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=kuba@kernel.org \
--cc=lars.povlsen@microchip.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=microsemi@lists.bootlin.com \
--cc=netdev@vger.kernel.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).