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* [PATCH v2 1/2] arm64: dts: qcom: sdm845: Add gpi dma node
@ 2020-12-01  4:25 Vinod Koul
  2020-12-01  4:25 ` [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node Vinod Koul
  0 siblings, 1 reply; 4+ messages in thread
From: Vinod Koul @ 2020-12-01  4:25 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Vinod Koul, Andy Gross, Rob Herring, devicetree,
	linux-kernel

This add the device node for gpi_dma0 and gpi_dma1 instances found in
sdm845.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 50 ++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 6465a6653ad9..dd252b479bd1 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1114,6 +1114,31 @@ opp-128000000 {
 			};
 		};
 
+		gpi_dma0: dma-controller@800000 {
+			compatible = "qcom,sdm845-gpi-dma";
+			reg = <0 0x00800000 0 0x60000>;
+			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+
+			#dma-cells = <3>;
+			dma-channels = <13>;
+			dma-channel-mask = <0xfa>;
+			iommus = <&apps_smmu 0x0016 0x0>;
+
+			status = "disabled";
+		};
+
 		qupv3_id_0: geniqup@8c0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0 0x008c0000 0 0x6000>;
@@ -1454,6 +1479,31 @@ uart7: serial@89c000 {
 			};
 		};
 
+		gpi_dma1: dma-controller@0xa00000 {
+			compatible = "qcom,sdm845-gpi-dma";
+			reg = <0 0x00a00000 0 0x60000>;
+			interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+
+			#dma-cells = <3>;
+			dma-channels = <13>;
+			dma-channel-mask = <0xfa>;
+			iommus = <&apps_smmu 0x06d6 0x0>;
+
+			status = "disabled";
+		};
+
 		qupv3_id_1: geniqup@ac0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0 0x00ac0000 0 0x6000>;
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node
  2020-12-01  4:25 [PATCH v2 1/2] arm64: dts: qcom: sdm845: Add gpi dma node Vinod Koul
@ 2020-12-01  4:25 ` Vinod Koul
  2020-12-02  1:06   ` Bjorn Andersson
  0 siblings, 1 reply; 4+ messages in thread
From: Vinod Koul @ 2020-12-01  4:25 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Vinod Koul, Andy Gross, Rob Herring, devicetree,
	linux-kernel

gpi_dma0 can be used for spi and i2c transfers on db845c, so enable it

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 7cc236575ee2..0653468f26ce 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -418,6 +418,10 @@ &gcc {
 			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
 };
 
+&gpi_dma0 {
+	status = "okay";
+};
+
 &gpu {
 	zap-shader {
 		memory-region = <&gpu_mem>;
-- 
2.26.2


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node
  2020-12-01  4:25 ` [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node Vinod Koul
@ 2020-12-02  1:06   ` Bjorn Andersson
  2020-12-02  4:25     ` Vinod Koul
  0 siblings, 1 reply; 4+ messages in thread
From: Bjorn Andersson @ 2020-12-02  1:06 UTC (permalink / raw)
  To: Vinod Koul
  Cc: linux-arm-msm, Andy Gross, Rob Herring, devicetree, linux-kernel

On Mon 30 Nov 22:25 CST 2020, Vinod Koul wrote:

> gpi_dma0 can be used for spi and i2c transfers on db845c, so enable it
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> index 7cc236575ee2..0653468f26ce 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> @@ -418,6 +418,10 @@ &gcc {
>  			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
>  };
>  
> +&gpi_dma0 {
> +	status = "okay";
> +};
> +

But you're only enabling the gpi, you don't have anything wired to it,
so why enable it?

I took a look downstream and they have all the i2c and spi nodes with
their dmas filled out - and the two gpis enabled at all times
(sdm845.dtsi). Can/should we do the same?

Regards,
Bjorn

>  &gpu {
>  	zap-shader {
>  		memory-region = <&gpu_mem>;
> -- 
> 2.26.2
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node
  2020-12-02  1:06   ` Bjorn Andersson
@ 2020-12-02  4:25     ` Vinod Koul
  0 siblings, 0 replies; 4+ messages in thread
From: Vinod Koul @ 2020-12-02  4:25 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Andy Gross, Rob Herring, devicetree, linux-kernel

On 01-12-20, 19:06, Bjorn Andersson wrote:
> On Mon 30 Nov 22:25 CST 2020, Vinod Koul wrote:
> 
> > gpi_dma0 can be used for spi and i2c transfers on db845c, so enable it
> > 
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > index 7cc236575ee2..0653468f26ce 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > @@ -418,6 +418,10 @@ &gcc {
> >  			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
> >  };
> >  
> > +&gpi_dma0 {
> > +	status = "okay";
> > +};
> > +
> 
> But you're only enabling the gpi, you don't have anything wired to it,
> so why enable it?
> 
> I took a look downstream and they have all the i2c and spi nodes with
> their dmas filled out - and the two gpis enabled at all times
> (sdm845.dtsi). Can/should we do the same?

So dma is merged and in linux-next but support for spi/i2c is not as
that is dependent upon dmaengine interface introduced for this.

I was planning to post spi/i2c after rc1 and also the dts enabling them

-- 
~Vinod

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-12-02  4:26 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-01  4:25 [PATCH v2 1/2] arm64: dts: qcom: sdm845: Add gpi dma node Vinod Koul
2020-12-01  4:25 ` [PATCH v2 2/2] arm64: dts: qcom: db845c: Enable gpi_dma0 node Vinod Koul
2020-12-02  1:06   ` Bjorn Andersson
2020-12-02  4:25     ` Vinod Koul

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