[PATCH 0/6] arm64: dts: qcom: qrb5165-rb5 audio support

[PATCH 0/6] arm64: dts: qcom: qrb5165-rb5 audio support

[Srinivas Kandagatla]

This patchset adds support to Qualcomm Robotics RB5 Development Kit based on
QRB5165 Robotics SoC. This board has 2 WSA881X smart speakers with onboard
DMIC connected to internal LPASS codec via WSA and VA macros respectively.

All the audio related driver patches are merged via respective maintainer trees
along with bindings. Only LPI pinctrl driver is not merged yet, however the
bindings are acked by Rob, so am guessing that the dt changes should be okay to go!

Thanks,
srini

Srinivas Kandagatla (6):
  arm64: dts: qcom: sm8250: add apr and its services
  arm64: dts: qcom: sm8250: add audio clock controllers
  arm64: dts: qcom: sm8250: add lpass lpi pin controller node
  arm64: dts: qcom: sm8250: add wsa and va codec macros
  arm64: dts: qcom: sm8250: add mi2s pinconfs
  arm64: dts: qcom: qrb5165-rb5: Add Audio support

 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 125 +++++++++
 arch/arm64/boot/dts/qcom/sm8250.dtsi     | 327 +++++++++++++++++++++++
 2 files changed, 452 insertions(+)

-- 
2.21.0

[PATCH 1/6] arm64: dts: qcom: sm8250: add apr and its services

[Srinivas Kandagatla]

Add apr node and its associated services required for audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 65acd1f381eb..3b4e98b13d36 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -11,6 +11,8 @@
 #include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-aoss-qmp.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/soc/qcom,apr.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -2620,6 +2622,60 @@
 				label = "lpass";
 				qcom,remote-pid = <2>;
 
+				apr {
+					compatible = "qcom,apr-v2";
+					qcom,glink-channels = "apr_audio_svc";
+					qcom,apr-domain = <APR_DOMAIN_ADSP>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					apr-service@3 {
+						reg = <APR_SVC_ADSP_CORE>;
+						compatible = "qcom,q6core";
+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
+					};
+
+					q6afe: apr-service@4 {
+						compatible = "qcom,q6afe";
+						reg = <APR_SVC_AFE>;
+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
+						q6afedai: dais {
+							compatible = "qcom,q6afe-dais";
+							#address-cells = <1>;
+							#size-cells = <0>;
+							#sound-dai-cells = <1>;
+						};
+
+						q6afecc: cc {
+							compatible = "qcom,q6afe-clocks";
+							#clock-cells = <2>;
+						};
+					};
+
+					q6asm: apr-service@7 {
+						compatible = "qcom,q6asm";
+						reg = <APR_SVC_ASM>;
+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
+						q6asmdai: dais {
+							compatible = "qcom,q6asm-dais";
+							#address-cells = <1>;
+							#size-cells = <0>;
+							#sound-dai-cells = <1>;
+							iommus = <&apps_smmu 0x1801 0x0>;
+						};
+					};
+
+					q6adm: apr-service@8 {
+						compatible = "qcom,q6adm";
+						reg = <APR_SVC_ADM>;
+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
+						q6routing: routing {
+							compatible = "qcom,q6adm-routing";
+							#sound-dai-cells = <0>;
+						};
+					};
+				};
+
 				fastrpc {
 					compatible = "qcom,fastrpc";
 					qcom,glink-channels = "fastrpcglink-apps-dsp";
-- 
2.21.0

[PATCH 2/6] arm64: dts: qcom: sm8250: add audio clock controllers

[Srinivas Kandagatla]

Add audiocc and aoncc clock controller nodes required for audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 3b4e98b13d36..ec5b53b8f656 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -6,6 +6,8 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -2585,6 +2587,26 @@
 					<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		audiocc: clock-controller@3300000 {
+			compatible = "qcom,sm8250-lpass-audiocc";
+			reg = <0 0x03300000 0 0x30000>;
+			#clock-cells = <1>;
+			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "core", "audio", "bus";
+		};
+
+		aoncc: clock-controller@3380000 {
+			compatible = "qcom,sm8250-lpass-aoncc";
+			reg = <0 0x03380000 0 0x40000>;
+			#clock-cells = <1>;
+			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "core", "audio", "bus";
+		};
+
 		adsp: remoteproc@17300000 {
 			compatible = "qcom,sm8250-adsp-pas";
 			reg = <0 0x17300000 0 0x100>;
-- 
2.21.0

[PATCH 3/6] arm64: dts: qcom: sm8250: add lpass lpi pin controller node

[Srinivas Kandagatla]

Add LPASS LPI pinctrl node required for Audio functionality on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 95 ++++++++++++++++++++++++++++
 1 file changed, 95 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index ec5b53b8f656..4e1309b6571e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2607,6 +2607,101 @@
 			clock-names = "core", "audio", "bus";
 		};
 
+		lpass_tlmm: pinctrl@33c0000{
+			compatible = "qcom,sm8250-lpass-lpi-pinctrl";
+			reg = <0 0x33c0000 0x0 0x20000>,
+				 <0 0x3550000 0x0 0x10000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&lpass_tlmm 0 0 14>;
+
+			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "core", "audio";
+
+			wsa_swr_clk_pin {
+				wsa_swr_clk_sleep: wsa_swr_clk_sleep {
+					mux {
+						pins = "gpio10";
+						function = "wsa_swr_clk";
+						drive-strength = <2>;
+						input-enable;
+						bias-pull-down;
+					};
+				};
+
+				wsa_swr_clk_active: wsa_swr_clk_active {
+					mux {
+						pins = "gpio10";
+						function = "wsa_swr_clk";
+						drive-strength = <2>;
+						slew-rate = <1>;
+						bias-disable;
+					};
+				};
+			};
+
+			wsa_swr_data_pin {
+				wsa_swr_data_sleep: wsa_swr_data_sleep {
+					mux {
+						pins = "gpio11";
+						function = "wsa_swr_data";
+						drive-strength = <2>;
+						input-enable;
+						bias-pull-down;
+					};
+				};
+
+				wsa_swr_data_active: wsa_swr_data_active {
+					mux {
+						pins = "gpio11";
+						function = "wsa_swr_data";
+						drive-strength = <2>;
+						slew-rate = <1>;
+						bias-bus-hold;
+					};
+				};
+			};
+
+	                cdc_dmic01_data_active: dmic01_data_active {
+	                        mux {
+	                                pins = "gpio7";
+					function = "dmic1_data";
+	                                drive-strength = <8>;
+	                                input-enable;
+	                        };
+	                };
+
+	                cdc_dmic01_data_sleep: dmic01_data_sleep {
+	                        mux {
+	                                pins = "gpio7";
+					function = "dmic1_data";
+	                                drive-strength = <2>;
+	                                pull-down;
+	                                input-enable;
+	                        };
+	                };
+
+	                cdc_dmic01_clk_active: dmic01_clk_active {
+	                        mux {
+	                                pins = "gpio6";
+					function = "dmic1_clk";
+	                                drive-strength = <8>;
+	                                output-high;
+	                        };
+	                };
+
+	                cdc_dmic01_clk_sleep: dmic01_clk_sleep {
+	                        mux {
+	                                pins = "gpio6";
+					function = "dmic1_clk";
+	                                drive-strength = <2>;
+	                                bias-disable;
+	                                output-low;
+	                        };
+	                };
+		};
+
 		adsp: remoteproc@17300000 {
 			compatible = "qcom,sm8250-adsp-pas";
 			reg = <0 0x17300000 0 0x100>;
-- 
2.21.0

[PATCH 4/6] arm64: dts: qcom: sm8250: add wsa and va codec macros

[Srinivas Kandagatla]

Add support for WSA and VA codec macros along with WSA soundwire
controller required for getting audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 4e1309b6571e..19dd7460e586 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2702,6 +2702,62 @@
 	                };
 		};
 
+		wsamacro: codec@3240000 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>;
+
+			compatible = "qcom,sm8250-lpass-wsa-macro";
+			reg = <0 0x3240000 0 0x1000>;
+			clocks = <&audiocc LPASS_CDC_WSA_MCLK>,
+				<&audiocc LPASS_CDC_WSA_NPL>,
+				<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&aoncc LPASS_CDC_VA_MCLK>,
+				<&vamacro>;
+
+			clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen";
+
+			#clock-cells = <0>;
+			clock-frequency = <9600000>;
+			clock-output-names = "mclk";
+			#sound-dai-cells = <1>;
+		};
+
+		swr0: soundwire-controller@3250000 {
+			reg = <0 0x3250000 0 0x2000>;
+			compatible = "qcom,soundwire-v1.5.1";
+			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&wsamacro>;
+			clock-names = "iface";
+
+			qcom,din-ports = <2>;
+			qcom,dout-ports = <6>;
+
+			qcom,ports-sinterval-low =	/bits/ 8 <0x07 0x1F 0x3F 0x07 0x1F 0x3F 0x0F 0x0F>;
+			qcom,ports-offset1 = 		/bits/ 8 <0x01 0x02 0x0C 0x06 0x12 0x0D 0x07 0x0A >;
+			qcom,ports-offset2 = 		/bits/ 8 <0xFF 0x00 0x1F 0xFF 0x00 0x1F 0x00 0x00>;
+			qcom,ports-block-pack-mode = 	/bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>;
+
+			#sound-dai-cells = <1>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+		};
+
+		vamacro: codec@3370000 {
+			compatible = "qcom,sm8250-lpass-va-macro";
+			reg = <0 0x3370000 0 0x1000>;
+			clocks = <&aoncc LPASS_CDC_VA_MCLK>,
+				<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+			clock-names = "mclk", "macro", "dcodec";
+
+			#clock-cells = <0>;
+			clock-frequency = <9600000>;
+			clock-output-names = "fsgen";
+			#sound-dai-cells = <1>;
+		};
+
 		adsp: remoteproc@17300000 {
 			compatible = "qcom,sm8250-adsp-pas";
 			reg = <0 0x17300000 0 0x100>;
-- 
2.21.0

[PATCH 5/6] arm64: dts: qcom: sm8250: add mi2s pinconfs

[Srinivas Kandagatla]

Add primary and tertinary mi2s pinconfs required to get I2S audio.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 98 ++++++++++++++++++++++++++++
 1 file changed, 98 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 19dd7460e586..a87940e157be 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1561,6 +1561,9 @@
 			};
 		};
 
+		sound: sound {
+		};
+
 		usb_1_hsphy: phy@88e3000 {
 			compatible = "qcom,sm8250-usb-hs-phy",
 				     "qcom,usb-snps-hs-7nm-phy";
@@ -1884,6 +1887,60 @@
 			gpio-ranges = <&tlmm 0 0 180>;
 			wakeup-parent = <&pdc>;
 
+			pri_mi2s_sck_active: pri-mi2s-sck-active {
+				mux {
+					pins = "gpio138";
+					function = "mi2s0_sck";
+				};
+
+				config {
+					pins = "gpio138";
+					drive-strength = <8>;
+					bias-disable;
+					output-high;
+				};
+			};
+
+			pri_mi2s_ws_active: pri-mi2s-ws-active {
+				mux {
+					pins = "gpio141";
+					function = "mi2s0_ws";
+				};
+
+				config {
+					pins = "gpio141";
+					drive-strength = <8>;
+					output-high;
+				};
+			};
+
+			pri_mi2s_sd0_active: pri-mi2s-sd0-active {
+				mux {
+					pins = "gpio139";
+					function = "mi2s0_data0";
+				};
+
+				config {
+					pins = "gpio139";
+					drive-strength = <8>;
+					bias-disable;
+					output-high;
+				};
+			};
+
+			pri_mi2s_sd1_active: pri-mi2s-sd1-active {
+				mux {
+					pins = "gpio140";
+					function = "mi2s0_data1";
+				};
+
+				config {
+					pins = "gpio140";
+					drive-strength = <8>;
+					output-high;
+				};
+			};
+
 			qup_i2c0_default: qup-i2c0-default {
 				mux {
 					pins = "gpio28", "gpio29";
@@ -2480,6 +2537,47 @@
 					function = "qup18";
 				};
 			};
+
+			tert_mi2s_sck_active: tert-mi2s-sck-active {
+				mux {
+					pins = "gpio133";
+					function = "mi2s2_sck";
+				};
+
+				config {
+					pins = "gpio133";
+					drive-strength = <8>;
+					bias-disable;
+					output-high;
+				};
+			};
+
+			tert_mi2s_sd0_active: tert-mi2s-sd0-active {
+				mux {
+					pins = "gpio134";
+					function = "mi2s2_data0";
+				};
+
+				config {
+					pins = "gpio134";
+					drive-strength = <8>;
+					bias-disable;
+					output-high;
+				};
+			};
+
+			tert_mi2s_ws_active: tert-mi2s-ws-active {
+				mux {
+					pins = "gpio135";
+					function = "mi2s2_ws";
+				};
+
+				config {
+					pins = "gpio135";
+					drive-strength = <8>;
+					output-high;
+				};
+			};
 		};
 
 		apps_smmu: iommu@15000000 {
-- 
2.21.0

[PATCH 6/6] arm64: dts: qcom: qrb5165-rb5: Add Audio support

[Srinivas Kandagatla]

This patch add support for two WSA881X smart speakers attached via Soundwire
and a DMIC0 on the main board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 125 +++++++++++++++++++++++
 1 file changed, 125 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index ce22d4fa383e..03229d5cb9d3 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -7,6 +7,8 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
+#include <dt-bindings/sound/qcom,q6asm.h>
 #include "sm8250.dtsi"
 #include "pm8150.dtsi"
 #include "pm8150b.dtsi"
@@ -120,6 +122,11 @@
 	};
 };
 
+&adsp {
+	status = "okay";
+	firmware-name = "qcom/sm8250/adsp.mdt";
+};
+
 &apps_rsc {
 	pm8009-rpmh-regulators {
 		compatible = "qcom,pm8009-rpmh-regulators";
@@ -483,6 +490,35 @@
 	status = "okay";
 };
 
+&q6afedai {
+	qi2s@16 {
+		reg = <16>;
+		qcom,sd-lines = <0 1 2 3>;
+	};
+};
+
+/* TERT I2S Uses 1 I2S SD Lines for audio on LT9611 HDMI Bridge */
+&q6afedai {
+	qi2s@20 {
+		reg = <20>;
+		qcom,sd-lines = <0>;
+	};
+};
+
+&q6asmdai {
+	dai@0 {
+		reg = <0>;
+	};
+
+	dai@1 {
+		reg = <1>;
+	};
+
+	dai@2 {
+		reg = <2>;
+	};
+};
+
 &sdhc_2 {
 	status = "okay";
 	pinctrl-names = "default";
@@ -497,6 +533,88 @@
 	no-emmc;
 };
 
+&swr0 {
+
+	left_spkr: wsa8810-left{
+		compatible = "sdw10217211000";
+		reg = <0 3>;
+		powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
+		#thermal-sensor-cells = <0>;
+		sound-name-prefix = "SpkrLeft";
+		#sound-dai-cells = <0>;
+	};
+
+
+	right_spkr: wsa8810-right{
+		compatible = "sdw10217211000";
+		reg = <0 4>;
+		powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
+		#thermal-sensor-cells = <0>;
+		sound-name-prefix = "SpkrRight";
+		#sound-dai-cells = <0>;
+	};
+};
+
+&sound {
+	compatible = "qcom,qrb5165-rb5";
+	pinctrl-0 = <&tert_mi2s_sck_active
+			 &tert_mi2s_sd0_active
+			 &tert_mi2s_ws_active>;
+	pinctrl-names = "default";
+	model = "Qualcomm-RB5-WSA8815-Speakers-DMIC0";
+	audio-routing =
+		"SpkrLeft IN", "WSA_SPK1 OUT",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"VA DMIC0", "vdd-micb",
+                "VA DMIC1", "vdd-micb",
+		"MM_DL1",  "MultiMedia1 Playback",
+		"MultiMedia3 Capture", "MM_UL3";
+
+	mm1-dai-link {
+		link-name = "MultiMedia1";
+		cpu {
+			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
+		};
+	};
+
+	mm3-dai-link {
+		link-name = "MultiMedia3";
+		cpu {
+			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
+		};
+	};
+
+	dma-dai-link {
+		link-name = "WSA Playback";
+		cpu {
+			sound-dai = <&q6afedai WSA_CODEC_DMA_RX_0>;
+		};
+
+		platform {
+			sound-dai = <&q6routing>;
+		};
+
+		codec {
+			sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>;
+		};
+	};
+
+	va-dai-link {
+		link-name = "VA Capture";
+		cpu {
+			sound-dai = <&q6afedai VA_CODEC_DMA_TX_0>;
+		};
+
+		platform {
+			sound-dai = <&q6routing>;
+		};
+
+		codec {
+			sound-dai = <&vamacro 0>;
+		};
+	};
+};
+
 /* CAN */
 &spi0 {
 	status = "okay";
@@ -792,3 +910,10 @@
 	vdda-phy-supply = <&vreg_l9a_1p2>;
 	vdda-pll-supply = <&vreg_l18a_0p92>;
 };
+
+&vamacro {
+	pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
+	pinctrl-names = "default";
+	vdd-micb-supply = <&vreg_s4a_1p8>;
+	qcom,dmic-sample-rate = <600000>;
+};
-- 
2.21.0

Re: [PATCH 3/6] arm64: dts: qcom: sm8250: add lpass lpi pin controller node

[Bjorn Andersson]

On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:

> Add LPASS LPI pinctrl node required for Audio functionality on RB5.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 95 ++++++++++++++++++++++++++++
>  1 file changed, 95 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index ec5b53b8f656..4e1309b6571e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -2607,6 +2607,101 @@
>  			clock-names = "core", "audio", "bus";
>  		};
>  
> +		lpass_tlmm: pinctrl@33c0000{
> +			compatible = "qcom,sm8250-lpass-lpi-pinctrl";
> +			reg = <0 0x33c0000 0x0 0x20000>,
> +				 <0 0x3550000 0x0 0x10000>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			gpio-ranges = <&lpass_tlmm 0 0 14>;
> +
> +			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> +				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> +			clock-names = "core", "audio";
> +
> +			wsa_swr_clk_pin {

I prefer if you drop this outer "container" node.

> +				wsa_swr_clk_sleep: wsa_swr_clk_sleep {

Per the binding I think the name of this node should match '-pins$' and
the node name may not contain '_' characters.

> +					mux {

The pinctrl state is a collection of all pins, function and pinconf
properties of the phandle pointed to and its immediate child nodes. As
such you can flatten this inner "mux" level.


On the other hand, I'm assuming that you're always going to mux the
clock and data pin together, so instead of designing this around the
pins you could design it around the states and do:

			wsa_swr_active: wsa-swr-active-pins {
				clk {
					pins = "gpio10";
					function = "wsa_swr_clk";
					drive-strength = <2>;
					slew-rate = <1>;
					bias-disable;
				};

				data {
					pins = "gpio11";
					function = "wsa_swr_data";
					drive-strength = <2>;
					slew-rate = <1>;
					bias-bus-hold;

				};
			};

This way the state describes the whole thing and you don't end up with a
bunch of states for each part of the function.

Regards,
Bjorn

> +						pins = "gpio10";
> +						function = "wsa_swr_clk";
> +						drive-strength = <2>;
> +						input-enable;
> +						bias-pull-down;
> +					};
> +				};
> +
> +				wsa_swr_clk_active: wsa_swr_clk_active {
> +					mux {
> +						pins = "gpio10";
> +						function = "wsa_swr_clk";
> +						drive-strength = <2>;
> +						slew-rate = <1>;
> +						bias-disable;
> +					};
> +				};
> +			};
> +
> +			wsa_swr_data_pin {
> +				wsa_swr_data_sleep: wsa_swr_data_sleep {
> +					mux {
> +						pins = "gpio11";
> +						function = "wsa_swr_data";
> +						drive-strength = <2>;
> +						input-enable;
> +						bias-pull-down;
> +					};
> +				};
> +
> +				wsa_swr_data_active: wsa_swr_data_active {
> +					mux {
> +						pins = "gpio11";
> +						function = "wsa_swr_data";
> +						drive-strength = <2>;
> +						slew-rate = <1>;
> +						bias-bus-hold;
> +					};
> +				};
> +			};
> +
> +	                cdc_dmic01_data_active: dmic01_data_active {
> +	                        mux {
> +	                                pins = "gpio7";
> +					function = "dmic1_data";
> +	                                drive-strength = <8>;
> +	                                input-enable;
> +	                        };
> +	                };
> +
> +	                cdc_dmic01_data_sleep: dmic01_data_sleep {
> +	                        mux {
> +	                                pins = "gpio7";
> +					function = "dmic1_data";
> +	                                drive-strength = <2>;
> +	                                pull-down;
> +	                                input-enable;
> +	                        };
> +	                };
> +
> +	                cdc_dmic01_clk_active: dmic01_clk_active {
> +	                        mux {
> +	                                pins = "gpio6";
> +					function = "dmic1_clk";
> +	                                drive-strength = <8>;
> +	                                output-high;
> +	                        };
> +	                };
> +
> +	                cdc_dmic01_clk_sleep: dmic01_clk_sleep {
> +	                        mux {
> +	                                pins = "gpio6";
> +					function = "dmic1_clk";
> +	                                drive-strength = <2>;
> +	                                bias-disable;
> +	                                output-low;
> +	                        };
> +	                };
> +		};
> +
>  		adsp: remoteproc@17300000 {
>  			compatible = "qcom,sm8250-adsp-pas";
>  			reg = <0 0x17300000 0 0x100>;
> -- 
> 2.21.0
> 

Re: [PATCH 5/6] arm64: dts: qcom: sm8250: add mi2s pinconfs

[Bjorn Andersson]

On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:

> Add primary and tertinary mi2s pinconfs required to get I2S audio.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 98 ++++++++++++++++++++++++++++
>  1 file changed, 98 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 19dd7460e586..a87940e157be 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -1561,6 +1561,9 @@
>  			};
>  		};
>  
> +		sound: sound {
> +		};
> +
>  		usb_1_hsphy: phy@88e3000 {
>  			compatible = "qcom,sm8250-usb-hs-phy",
>  				     "qcom,usb-snps-hs-7nm-phy";
> @@ -1884,6 +1887,60 @@
>  			gpio-ranges = <&tlmm 0 0 180>;
>  			wakeup-parent = <&pdc>;
>  
> +			pri_mi2s_sck_active: pri-mi2s-sck-active {
> +				mux {

As in patch 3, please make these state-centric and flatten the inner
subnode.

> +					pins = "gpio138";
> +					function = "mi2s0_sck";
> +				};
> +
> +				config {
> +					pins = "gpio138";
> +					drive-strength = <8>;
> +					bias-disable;
> +					output-high;

If function is mi2s0_sck is the output value relevant? Or should this
be dropped?

Regards,
Bjorn

> +				};
> +			};
> +
> +			pri_mi2s_ws_active: pri-mi2s-ws-active {
> +				mux {
> +					pins = "gpio141";
> +					function = "mi2s0_ws";
> +				};
> +
> +				config {
> +					pins = "gpio141";
> +					drive-strength = <8>;
> +					output-high;
> +				};
> +			};
> +
> +			pri_mi2s_sd0_active: pri-mi2s-sd0-active {
> +				mux {
> +					pins = "gpio139";
> +					function = "mi2s0_data0";
> +				};
> +
> +				config {
> +					pins = "gpio139";
> +					drive-strength = <8>;
> +					bias-disable;
> +					output-high;
> +				};
> +			};
> +
> +			pri_mi2s_sd1_active: pri-mi2s-sd1-active {
> +				mux {
> +					pins = "gpio140";
> +					function = "mi2s0_data1";
> +				};
> +
> +				config {
> +					pins = "gpio140";
> +					drive-strength = <8>;
> +					output-high;
> +				};
> +			};
> +
>  			qup_i2c0_default: qup-i2c0-default {
>  				mux {
>  					pins = "gpio28", "gpio29";
> @@ -2480,6 +2537,47 @@
>  					function = "qup18";
>  				};
>  			};
> +
> +			tert_mi2s_sck_active: tert-mi2s-sck-active {
> +				mux {
> +					pins = "gpio133";
> +					function = "mi2s2_sck";
> +				};
> +
> +				config {
> +					pins = "gpio133";
> +					drive-strength = <8>;
> +					bias-disable;
> +					output-high;
> +				};
> +			};
> +
> +			tert_mi2s_sd0_active: tert-mi2s-sd0-active {
> +				mux {
> +					pins = "gpio134";
> +					function = "mi2s2_data0";
> +				};
> +
> +				config {
> +					pins = "gpio134";
> +					drive-strength = <8>;
> +					bias-disable;
> +					output-high;
> +				};
> +			};
> +
> +			tert_mi2s_ws_active: tert-mi2s-ws-active {
> +				mux {
> +					pins = "gpio135";
> +					function = "mi2s2_ws";
> +				};
> +
> +				config {
> +					pins = "gpio135";
> +					drive-strength = <8>;
> +					output-high;
> +				};
> +			};
>  		};
>  
>  		apps_smmu: iommu@15000000 {
> -- 
> 2.21.0
> 

Re: [PATCH 6/6] arm64: dts: qcom: qrb5165-rb5: Add Audio support

[Bjorn Andersson]

On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:

> This patch add support for two WSA881X smart speakers attached via Soundwire
> and a DMIC0 on the main board.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 125 +++++++++++++++++++++++
>  1 file changed, 125 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> index ce22d4fa383e..03229d5cb9d3 100644
> --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> @@ -7,6 +7,8 @@
>  
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/sound/qcom,q6afe.h>
> +#include <dt-bindings/sound/qcom,q6asm.h>
>  #include "sm8250.dtsi"
>  #include "pm8150.dtsi"
>  #include "pm8150b.dtsi"
> @@ -120,6 +122,11 @@
>  	};
>  };
>  
> +&adsp {
> +	status = "okay";
> +	firmware-name = "qcom/sm8250/adsp.mdt";

Rather than adding all the mdt + bXX files to linux-firmware (when that
day comes) can we please make this qcom/sm8250/adsp.mbn from the start?

The mbn can be generated from the existing files using
https://github.com/andersson/pil-squasher, or for testing purposes the
.mdt can simply be renamed .mbn and the mdt loader will find the
remaining .bXX files.

> +};
> +
>  &apps_rsc {
>  	pm8009-rpmh-regulators {
>  		compatible = "qcom,pm8009-rpmh-regulators";
> @@ -483,6 +490,35 @@
>  	status = "okay";
>  };
>  
> +&q6afedai {
> +	qi2s@16 {
> +		reg = <16>;
> +		qcom,sd-lines = <0 1 2 3>;
> +	};
> +};
> +
> +/* TERT I2S Uses 1 I2S SD Lines for audio on LT9611 HDMI Bridge */
> +&q6afedai {
> +	qi2s@20 {
> +		reg = <20>;
> +		qcom,sd-lines = <0>;
> +	};
> +};
> +
> +&q6asmdai {
> +	dai@0 {
> +		reg = <0>;
> +	};
> +
> +	dai@1 {
> +		reg = <1>;
> +	};
> +
> +	dai@2 {
> +		reg = <2>;
> +	};
> +};
> +
>  &sdhc_2 {
>  	status = "okay";
>  	pinctrl-names = "default";
> @@ -497,6 +533,88 @@
>  	no-emmc;
>  };
>  
> +&swr0 {
> +

Unnecessary empty line.

> +	left_spkr: wsa8810-left{
> +		compatible = "sdw10217211000";
> +		reg = <0 3>;
> +		powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
> +		#thermal-sensor-cells = <0>;
> +		sound-name-prefix = "SpkrLeft";
> +		#sound-dai-cells = <0>;
> +	};
> +

Ditto.

Regards,
Bjorn

> +
> +	right_spkr: wsa8810-right{
> +		compatible = "sdw10217211000";
> +		reg = <0 4>;
> +		powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
> +		#thermal-sensor-cells = <0>;
> +		sound-name-prefix = "SpkrRight";
> +		#sound-dai-cells = <0>;
> +	};
> +};
> +
> +&sound {
> +	compatible = "qcom,qrb5165-rb5";
> +	pinctrl-0 = <&tert_mi2s_sck_active
> +			 &tert_mi2s_sd0_active
> +			 &tert_mi2s_ws_active>;
> +	pinctrl-names = "default";
> +	model = "Qualcomm-RB5-WSA8815-Speakers-DMIC0";
> +	audio-routing =
> +		"SpkrLeft IN", "WSA_SPK1 OUT",
> +		"SpkrRight IN", "WSA_SPK2 OUT",
> +		"VA DMIC0", "vdd-micb",
> +                "VA DMIC1", "vdd-micb",
> +		"MM_DL1",  "MultiMedia1 Playback",
> +		"MultiMedia3 Capture", "MM_UL3";
> +
> +	mm1-dai-link {
> +		link-name = "MultiMedia1";
> +		cpu {
> +			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
> +		};
> +	};
> +
> +	mm3-dai-link {
> +		link-name = "MultiMedia3";
> +		cpu {
> +			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
> +		};
> +	};
> +
> +	dma-dai-link {
> +		link-name = "WSA Playback";
> +		cpu {
> +			sound-dai = <&q6afedai WSA_CODEC_DMA_RX_0>;
> +		};
> +
> +		platform {
> +			sound-dai = <&q6routing>;
> +		};
> +
> +		codec {
> +			sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>;
> +		};
> +	};
> +
> +	va-dai-link {
> +		link-name = "VA Capture";
> +		cpu {
> +			sound-dai = <&q6afedai VA_CODEC_DMA_TX_0>;
> +		};
> +
> +		platform {
> +			sound-dai = <&q6routing>;
> +		};
> +
> +		codec {
> +			sound-dai = <&vamacro 0>;
> +		};
> +	};
> +};
> +
>  /* CAN */
>  &spi0 {
>  	status = "okay";
> @@ -792,3 +910,10 @@
>  	vdda-phy-supply = <&vreg_l9a_1p2>;
>  	vdda-pll-supply = <&vreg_l18a_0p92>;
>  };
> +
> +&vamacro {
> +	pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
> +	pinctrl-names = "default";
> +	vdd-micb-supply = <&vreg_s4a_1p8>;
> +	qcom,dmic-sample-rate = <600000>;
> +};
> -- 
> 2.21.0
> 

Re: [PATCH 1/6] arm64: dts: qcom: sm8250: add apr and its services

[Bjorn Andersson]

On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:

> Add apr node and its associated services required for audio on RB5.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 56 ++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 65acd1f381eb..3b4e98b13d36 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -11,6 +11,8 @@
>  #include <dt-bindings/mailbox/qcom-ipcc.h>
>  #include <dt-bindings/power/qcom-aoss-qmp.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
> +#include <dt-bindings/soc/qcom,apr.h>
> +#include <dt-bindings/sound/qcom,q6afe.h>

Please move this line one step down to maintain the alphabetical sort
order.

Thanks,
Bjorn

>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>  #include <dt-bindings/thermal/thermal.h>
>  
> @@ -2620,6 +2622,60 @@
>  				label = "lpass";
>  				qcom,remote-pid = <2>;
>  
> +				apr {
> +					compatible = "qcom,apr-v2";
> +					qcom,glink-channels = "apr_audio_svc";
> +					qcom,apr-domain = <APR_DOMAIN_ADSP>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +
> +					apr-service@3 {
> +						reg = <APR_SVC_ADSP_CORE>;
> +						compatible = "qcom,q6core";
> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
> +					};
> +
> +					q6afe: apr-service@4 {
> +						compatible = "qcom,q6afe";
> +						reg = <APR_SVC_AFE>;
> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
> +						q6afedai: dais {
> +							compatible = "qcom,q6afe-dais";
> +							#address-cells = <1>;
> +							#size-cells = <0>;
> +							#sound-dai-cells = <1>;
> +						};
> +
> +						q6afecc: cc {
> +							compatible = "qcom,q6afe-clocks";
> +							#clock-cells = <2>;
> +						};
> +					};
> +
> +					q6asm: apr-service@7 {
> +						compatible = "qcom,q6asm";
> +						reg = <APR_SVC_ASM>;
> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
> +						q6asmdai: dais {
> +							compatible = "qcom,q6asm-dais";
> +							#address-cells = <1>;
> +							#size-cells = <0>;
> +							#sound-dai-cells = <1>;
> +							iommus = <&apps_smmu 0x1801 0x0>;
> +						};
> +					};
> +
> +					q6adm: apr-service@8 {
> +						compatible = "qcom,q6adm";
> +						reg = <APR_SVC_ADM>;
> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
> +						q6routing: routing {
> +							compatible = "qcom,q6adm-routing";
> +							#sound-dai-cells = <0>;
> +						};
> +					};
> +				};
> +
>  				fastrpc {
>  					compatible = "qcom,fastrpc";
>  					qcom,glink-channels = "fastrpcglink-apps-dsp";
> -- 
> 2.21.0
> 

Re: [PATCH 0/6] arm64: dts: qcom: qrb5165-rb5 audio support

[Dmitry Baryshkov]

On 01/12/2020 18:37, Srinivas Kandagatla wrote:
> This patchset adds support to Qualcomm Robotics RB5 Development Kit based on
> QRB5165 Robotics SoC. This board has 2 WSA881X smart speakers with onboard
> DMIC connected to internal LPASS codec via WSA and VA macros respectively.
> 
> All the audio related driver patches are merged via respective maintainer trees
> along with bindings. Only LPI pinctrl driver is not merged yet, however the
> bindings are acked by Rob, so am guessing that the dt changes should be okay to go!
> 
> Thanks,
> srini
> 
> Srinivas Kandagatla (6):
>    arm64: dts: qcom: sm8250: add apr and its services
>    arm64: dts: qcom: sm8250: add audio clock controllers
>    arm64: dts: qcom: sm8250: add lpass lpi pin controller node
>    arm64: dts: qcom: sm8250: add wsa and va codec macros
>    arm64: dts: qcom: sm8250: add mi2s pinconfs
>    arm64: dts: qcom: qrb5165-rb5: Add Audio support

Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> 
>   arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 125 +++++++++
>   arch/arm64/boot/dts/qcom/sm8250.dtsi     | 327 +++++++++++++++++++++++
>   2 files changed, 452 insertions(+)
> 


-- 
With best wishes
Dmitry

Re: [PATCH 1/6] arm64: dts: qcom: sm8250: add apr and its services

[Srinivas Kandagatla]

Many thanks Bjorn for review,

On 01/12/2020 19:25, Bjorn Andersson wrote:
> On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:
> 
>> Add apr node and its associated services required for audio on RB5.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8250.dtsi | 56 ++++++++++++++++++++++++++++
>>   1 file changed, 56 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> index 65acd1f381eb..3b4e98b13d36 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> @@ -11,6 +11,8 @@
>>   #include <dt-bindings/mailbox/qcom-ipcc.h>
>>   #include <dt-bindings/power/qcom-aoss-qmp.h>
>>   #include <dt-bindings/power/qcom-rpmpd.h>
>> +#include <dt-bindings/soc/qcom,apr.h>
>> +#include <dt-bindings/sound/qcom,q6afe.h>
> 
> Please move this line one step down to maintain the alphabetical sort
> order.

I agree with all the comments on this patch as well as other patches, 
will send v2 with those fixed!

Thanks,
srini
> 
> Thanks,
> Bjorn
> 
>>   #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>>   #include <dt-bindings/thermal/thermal.h>
>>   
>> @@ -2620,6 +2622,60 @@
>>   				label = "lpass";
>>   				qcom,remote-pid = <2>;
>>   
>> +				apr {
>> +					compatible = "qcom,apr-v2";
>> +					qcom,glink-channels = "apr_audio_svc";
>> +					qcom,apr-domain = <APR_DOMAIN_ADSP>;
>> +					#address-cells = <1>;
>> +					#size-cells = <0>;
>> +
>> +					apr-service@3 {
>> +						reg = <APR_SVC_ADSP_CORE>;
>> +						compatible = "qcom,q6core";
>> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
>> +					};
>> +
>> +					q6afe: apr-service@4 {
>> +						compatible = "qcom,q6afe";
>> +						reg = <APR_SVC_AFE>;
>> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
>> +						q6afedai: dais {
>> +							compatible = "qcom,q6afe-dais";
>> +							#address-cells = <1>;
>> +							#size-cells = <0>;
>> +							#sound-dai-cells = <1>;
>> +						};
>> +
>> +						q6afecc: cc {
>> +							compatible = "qcom,q6afe-clocks";
>> +							#clock-cells = <2>;
>> +						};
>> +					};
>> +
>> +					q6asm: apr-service@7 {
>> +						compatible = "qcom,q6asm";
>> +						reg = <APR_SVC_ASM>;
>> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
>> +						q6asmdai: dais {
>> +							compatible = "qcom,q6asm-dais";
>> +							#address-cells = <1>;
>> +							#size-cells = <0>;
>> +							#sound-dai-cells = <1>;
>> +							iommus = <&apps_smmu 0x1801 0x0>;
>> +						};
>> +					};
>> +
>> +					q6adm: apr-service@8 {
>> +						compatible = "qcom,q6adm";
>> +						reg = <APR_SVC_ADM>;
>> +						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
>> +						q6routing: routing {
>> +							compatible = "qcom,q6adm-routing";
>> +							#sound-dai-cells = <0>;
>> +						};
>> +					};
>> +				};
>> +
>>   				fastrpc {
>>   					compatible = "qcom,fastrpc";
>>   					qcom,glink-channels = "fastrpcglink-apps-dsp";
>> -- 
>> 2.21.0
>>