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Wed, 2 Dec 2020 11:07:03 -0500 (EST) Date: Wed, 2 Dec 2020 17:07:02 +0100 From: Maxime Ripard To: Andre Przywara Cc: Chen-Yu Tsai , Jernej Skrabec , Icenowy Zheng , linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Linus Walleij , Rob Herring , Yangtao Li , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 8/8] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Message-ID: <20201202160702.rdigwtcv3avil4n3@gilmour> References: <20201202135409.13683-1-andre.przywara@arm.com> <20201202135409.13683-9-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ojkz43yurbxnyb2s" Content-Disposition: inline In-Reply-To: <20201202135409.13683-9-andre.przywara@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --ojkz43yurbxnyb2s Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Dec 02, 2020 at 01:54:09PM +0000, Andre Przywara wrote: > The OrangePi Zero 2 is a development board with the new H616 SoC. >=20 > It features the usual connectors used on those small boards, and comes > with the AXP305, which seems to be compatible with the AXP805. >=20 > For more details see: http://linux-sunxi.org/Xunlong_Orange_Pi_Zero2 >=20 > Signed-off-by: Andre Przywara > --- > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../allwinner/sun50i-h616-orangepi-zero2.dts | 228 ++++++++++++++++++ > 2 files changed, 229 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-ze= ro2.dts >=20 > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts= /allwinner/Makefile > index 211d1e9d4701..0cf8299b1ce7 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -35,3 +35,4 @@ dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-orangepi-one-pl= us.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-pine-h64.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-pine-h64-model-b.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h6-tanix-tx6.dtb > +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h616-orangepi-zero2.dtb > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts= b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > new file mode 100644 > index 000000000000..814f5b4fec7c > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > @@ -0,0 +1,228 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2020 Arm Ltd. > + */ > + > +/dts-v1/; > + > +#include "sun50i-h616.dtsi" > + > +#include > +#include > + > +/ { > + model =3D "OrangePi Zero2"; > + compatible =3D "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; This needs to be documented too > + aliases { > + ethernet0 =3D &emac0; > + serial0 =3D &uart0; > + }; > + > + chosen { > + stdout-path =3D "serial0:115200n8"; > + }; > + > + leds { > + compatible =3D "gpio-leds"; > + > + power { > + label =3D "orangepi:red:power"; > + gpios =3D <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ > + default-state =3D "on"; > + }; > + > + status { > + label =3D "orangepi:green:status"; > + gpios =3D <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ > + }; Those node names don't follow the led binding convention > + }; > + > + reg_vcc5v: vcc5v { > + /* board wide 5V supply directly from the USB-C socket */ > + compatible =3D "regulator-fixed"; > + regulator-name =3D "vcc-5v"; > + regulator-min-microvolt =3D <5000000>; > + regulator-max-microvolt =3D <5000000>; > + regulator-always-on; > + }; > + > + reg_usb1_vbus: usb1-vbus { > + compatible =3D "regulator-fixed"; > + regulator-name =3D "usb1-vbus"; > + regulator-min-microvolt =3D <5000000>; > + regulator-max-microvolt =3D <5000000>; > + enable-active-high; > + gpio =3D <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ > + status =3D "okay"; > + }; > +}; > + > +&ehci0 { > + status =3D "okay"; > +}; > + > +&ehci1 { > + status =3D "okay"; > +}; > + > +/* USB 2 & 3 are on headers only. */ > + > +&emac0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&ext_rgmii_pins>; > + phy-mode =3D "rgmii"; > + phy-handle =3D <&ext_rgmii_phy>; > + phy-supply =3D <®_dcdce>; > + allwinner,rx-delay-ps =3D <3100>; > + allwinner,tx-delay-ps =3D <700>; > + status =3D "okay"; > +}; > + > +&mdio { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible =3D "ethernet-phy-ieee802.3-c22"; > + reg =3D <1>; > + }; > +}; > + > +&mmc0 { > + vmmc-supply =3D <®_dcdce>; > + cd-gpios =3D <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > + bus-width =3D <4>; > + status =3D "okay"; > +}; > + > +&ohci0 { > + status =3D "okay"; > +}; > + > +&ohci1 { > + status =3D "okay"; > +}; > + > +&r_i2c { > + status =3D "okay"; > + > + axp305: pmic@36 { > + compatible =3D "x-powers,axp305", "x-powers,axp805", > + "x-powers,axp806"; > + reg =3D <0x36>; > + > + /* dummy interrupt to appease the driver for now */ > + interrupts =3D ; > + interrupt-controller; > + #interrupt-cells =3D <1>; > + > + x-powers,self-working-mode; > + vina-supply =3D <®_vcc5v>; > + vinb-supply =3D <®_vcc5v>; > + vinc-supply =3D <®_vcc5v>; > + vind-supply =3D <®_vcc5v>; > + vine-supply =3D <®_vcc5v>; > + aldoin-supply =3D <®_vcc5v>; > + bldoin-supply =3D <®_vcc5v>; > + cldoin-supply =3D <®_vcc5v>; > + > + regulators { > + reg_aldo1: aldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-sys"; > + }; > + > + reg_aldo2: aldo2 { > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc3v3-ext"; > + }; > + > + reg_aldo3: aldo3 { > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc3v3-ext2"; > + }; > + > + reg_bldo1: bldo1 { > + regulator-always-on; > + regulator-min-microvolt =3D <1800000>; > + regulator-max-microvolt =3D <1800000>; > + regulator-name =3D "vcc1v8"; > + }; > + > + bldo2 { > + /* unused */ > + }; > + > + bldo3 { > + /* unused */ > + }; > + > + bldo4 { > + /* unused */ > + }; > + > + cldo1 { > + /* reserved */ > + }; > + > + cldo2 { > + /* unused */ > + }; > + > + cldo3 { > + /* unused */ > + }; > + > + reg_dcdca: dcdca { > + regulator-always-on; > + regulator-min-microvolt =3D <810000>; > + regulator-max-microvolt =3D <1080000>; > + regulator-name =3D "vdd-cpu"; > + }; > + > + reg_dcdcc: dcdcc { > + regulator-always-on; > + regulator-min-microvolt =3D <810000>; > + regulator-max-microvolt =3D <1080000>; > + regulator-name =3D "vdd-gpu-sys"; > + }; > + > + reg_dcdcd: dcdcd { > + regulator-always-on; > + regulator-min-microvolt =3D <1500000>; > + regulator-max-microvolt =3D <1500000>; > + regulator-name =3D "vdd-dram"; > + }; > + > + reg_dcdce: dcdce { > + regulator-boot-on; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + regulator-name =3D "vcc-eth-mmc"; > + }; > + > + sw { > + /* unused */ > + }; > + }; > + }; > +}; > + > +&uart0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart0_ph_pins>; > + status =3D "okay"; > +}; > + > +&usbotg { > + dr_mode =3D "otg"; > + status =3D "okay"; > +}; > + > +&usbphy { > + usb0_vbus-supply =3D <®_vcc5v>; > + usb1_vbus-supply =3D <®_usb1_vbus>; > + status =3D "okay"; > +}; Did you really test it as OTG without an ID pin? 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