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[84.226.167.205]) by smtp.googlemail.com with ESMTPSA id be6sm471571edb.29.2020.12.02.09.45.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 09:45:39 -0800 (PST) Date: Wed, 2 Dec 2020 19:45:38 +0200 From: Krzysztof Kozlowski To: Jagan Teki Cc: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam , Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com Subject: Re: [PATCH 08/10] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 Message-ID: <20201202174538.GH3490@kozik-lap> References: <20201202121241.109952-1-jagan@amarulasolutions.com> <20201202121241.109952-9-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201202121241.109952-9-jagan@amarulasolutions.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 02, 2020 at 05:42:39PM +0530, Jagan Teki wrote: > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam. > > C.TOUCH 2.0 is a general purpose carrier board with capacitive > touch interface support. > > i.Core MX8M Mini needs to mount on top of this Carrier board for > creating complete i.Core MX8M Mini C.TOUCH 2.0 board. > > Add support for it. > > Signed-off-by: Matteo Lisi > Signed-off-by: Jagan Teki > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 4369d783dade..8191db4c64fa 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts > new file mode 100644 > index 000000000000..aa3c03ad3109 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2019 NXP > + * Copyright (c) 2019 Engicam srl > + * Copyright (c) 2020 Amarula Solutions(India) > + */ > + > +/dts-v1/; > +#include "imx8mm.dtsi" You have multiple DTSI files to only include one DTSI. I was trying to follow the logic here but I failed... This is ctouch, so it should include SoM, which you call icore. But it also includes ctouch2 which *only* includes common DTSI. It's then exactly the same as starter kit which includes edimm (which includes common) and icore. Best regards, Krzysztof > +#include "imx8mm-engicam-ctouch2.dtsi" > +#include "imx8mm-engicam-icore-mx8mm.dtsi" > + > +/ {