[PATCH v2 1/3] dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support

[PATCH v2 1/3] dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support

[Troy Lee]

Adding Aspeed AST2400 and AST2600 binding for edac driver.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
---
 .../devicetree/bindings/edac/aspeed-sdram-edac.txt       | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
index 6a0f3d90d682..8ca9e0a049d8 100644
--- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
+++ b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
@@ -1,6 +1,6 @@
-Aspeed AST2500 SoC EDAC node
+Aspeed BMC SoC EDAC node
 
-The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error
+The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
 correction check).
 
 The memory controller supports SECDED (single bit error correction, double bit
@@ -11,7 +11,10 @@ Note, the bootloader must configure ECC mode in the memory controller.
 
 
 Required properties:
-- compatible: should be "aspeed,ast2500-sdram-edac"
+- compatible: should be one of
+	- "aspeed,ast2400-sdram-edac"
+	- "aspeed,ast2500-sdram-edac"
+	- "aspeed,ast2600-sdram-edac"
 - reg:        sdram controller register set should be <0x1e6e0000 0x174>
 - interrupts: should be AVIC interrupt #0
 
-- 
2.17.1

[PATCH v2 2/3] ARM: dts: aspeed: Add AST2600 edac into common devicetree

[Troy Lee]

Adding Aspeed AST2600 edac node into common devicetree.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 97ca743363d7..fb144515f397 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -69,6 +69,12 @@
 		always-on;
 	};
 
+	edac: sdram@1e6e0000 {
+		compatible = "aspeed,ast2600-sdram-edac", "syscon";
+		reg = <0x1e6e0000 0x174>;
+		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	ahb {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
2.17.1

[PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Troy Lee]

Adding AST2400 and AST2600 edac driver support.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
---
Change since v1:
1. Removing SoC specific code
2. Changing numerical representation of memory sizing
---
 drivers/edac/Kconfig       |   6 +--
 drivers/edac/aspeed_edac.c | 103 +++++++++++++++++++++++++++++--------
 2 files changed, 85 insertions(+), 24 deletions(-)

diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index fc30f2ef9782..8ea70746d0bf 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -508,10 +508,10 @@ config EDAC_QCOM
 	  health, you should probably say 'Y' here.
 
 config EDAC_ASPEED
-	tristate "Aspeed AST 2500 SoC"
-	depends on MACH_ASPEED_G5
+	tristate "Aspeed AST BMC SoC"
+	depends on (MACH_ASPEED_G4 || MACH_ASPEED_G5 || MACH_ASPEED_G6)
 	help
-	  Support for error detection and correction on the Aspeed AST 2500 SoC.
+	  Support for error detection and correction on the Aspeed AST BMC SoC.
 
 	  First, ECC must be configured in the bootloader. Then, this driver
 	  will expose error counters via the EDAC kernel framework.
diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c
index fbec28dc661d..b8c8d6a05f91 100644
--- a/drivers/edac/aspeed_edac.c
+++ b/drivers/edac/aspeed_edac.c
@@ -14,12 +14,11 @@
 #include <linux/regmap.h>
 #include "edac_module.h"
 
-
 #define DRV_NAME "aspeed-edac"
 
-
 #define ASPEED_MCR_PROT        0x00 /* protection key register */
 #define ASPEED_MCR_CONF        0x04 /* configuration register */
+#define ASPEED_MCR_REQ         0x08 /* Graphics Memory Protection register */
 #define ASPEED_MCR_INTR_CTRL   0x50 /* interrupt control/status register */
 #define ASPEED_MCR_ADDR_UNREC  0x58 /* address of first un-recoverable error */
 #define ASPEED_MCR_ADDR_REC    0x5c /* address of last recoverable error */
@@ -29,15 +28,17 @@
 #define ASPEED_MCR_PROT_PASSWD	            0xfc600309
 #define ASPEED_MCR_CONF_DRAM_TYPE               BIT(4)
 #define ASPEED_MCR_CONF_ECC                     BIT(7)
+#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE (BIT(28)|BIT(29)|BIT(30)|BIT(31))
 #define ASPEED_MCR_INTR_CTRL_CLEAR             BIT(31)
 #define ASPEED_MCR_INTR_CTRL_CNT_REC   GENMASK(23, 16)
 #define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12)
 #define ASPEED_MCR_INTR_CTRL_ENABLE  (BIT(0) | BIT(1))
 
+#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500  0x01
+#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600  0x03
 
 static struct regmap *aspeed_regmap;
 
-
 static int regmap_reg_write(void *context, unsigned int reg, unsigned int val)
 {
 	void __iomem *regs = (void __iomem *)context;
@@ -53,7 +54,6 @@ static int regmap_reg_write(void *context, unsigned int reg, unsigned int val)
 	return 0;
 }
 
-
 static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
 {
 	void __iomem *regs = (void __iomem *)context;
@@ -63,6 +63,79 @@ static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
 	return 0;
 }
 
+extern void aspeed_sdmc_disable_mem_protection(u8 req)
+{
+	u32 req_val = 0;
+
+	regmap_read(aspeed_regmap, ASPEED_MCR_REQ, &req_val);
+
+	req_val &= ~BIT(req);
+
+	regmap_write(aspeed_regmap, ASPEED_MCR_REQ, req_val);
+}
+EXPORT_SYMBOL(aspeed_sdmc_disable_mem_protection);
+
+static const u32 ast2400_dram_table[] = {
+	64 << 20,
+	128 << 20,
+	256 << 20,
+	512 << 20,
+};
+
+static const u32 ast2500_dram_table[] = {
+	128 << 20,
+	256 << 20,
+	512 << 20,
+	1024 << 20,
+};
+
+static const u32 ast2600_dram_table[] = {
+	256 << 20,
+	512 << 20,
+	1024 << 20,
+	2048 << 20,
+};
+
+extern u32 aspeed_get_dram_size(void)
+{
+	u32 reg04;
+	u32 size;
+	u8 type;
+
+	regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
+
+	type = (reg04 & ASPEED_MCR_CONF_DRAM_CTRL_TYPE) >> 28;
+
+	if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600)
+		size = ast2600_dram_table[reg04 & 0x3];
+	else if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500)
+		size = ast2500_dram_table[reg04 & 0x3];
+	else
+		size = ast2400_dram_table[reg04 & 0x3];
+
+	return size;
+}
+EXPORT_SYMBOL(aspeed_get_dram_size);
+
+static const u32 aspeed_vga_table[] = {
+	8 << 20,
+	16 << 20,
+	32 << 20,
+	64 << 20,
+};
+
+extern u32 aspeed_get_vga_size(void)
+{
+	u32 reg04;
+	u32 size;
+
+	regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
+
+	size = aspeed_vga_table[((reg04 & 0xC) >> 2)];
+	return size;
+}
+EXPORT_SYMBOL(aspeed_get_vga_size);
+
 static bool regmap_is_volatile(struct device *dev, unsigned int reg)
 {
 	switch (reg) {
@@ -227,7 +300,6 @@ static int config_irq(void *ctx, struct platform_device *pdev)
 	return 0;
 }
 
-
 static int init_csrows(struct mem_ctl_info *mci)
 {
 	struct csrow_info *csrow = mci->csrows[0];
@@ -239,7 +311,7 @@ static int init_csrows(struct mem_ctl_info *mci)
 	int rc;
 
 	/* retrieve info about physical memory from device tree */
-	np = of_find_node_by_path("/memory");
+	np = of_find_node_by_name(NULL, "memory");
 	if (!np) {
 		dev_err(mci->pdev, "dt: missing /memory node\n");
 		return -ENODEV;
@@ -275,14 +347,12 @@ static int init_csrows(struct mem_ctl_info *mci)
 	return 0;
 }
 
-
 static int aspeed_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct edac_mc_layer layers[2];
 	struct mem_ctl_info *mci;
 	void __iomem *regs;
-	u32 reg04;
 	int rc;
 
 	regs = devm_platform_ioremap_resource(pdev, 0);
@@ -294,13 +364,6 @@ static int aspeed_probe(struct platform_device *pdev)
 	if (IS_ERR(aspeed_regmap))
 		return PTR_ERR(aspeed_regmap);
 
-	/* bail out if ECC mode is not configured */
-	regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
-	if (!(reg04 & ASPEED_MCR_CONF_ECC)) {
-		dev_err(&pdev->dev, "ECC mode is not configured in u-boot\n");
-		return -EPERM;
-	}
-
 	edac_op_state = EDAC_OPSTATE_INT;
 
 	/* allocate & init EDAC MC data structure */
@@ -373,12 +436,13 @@ static int aspeed_remove(struct platform_device *pdev)
 	return 0;
 }
 
-
 static const struct of_device_id aspeed_of_match[] = {
+	{ .compatible = "aspeed,ast2400-sdram-edac" },
 	{ .compatible = "aspeed,ast2500-sdram-edac" },
+	{ .compatible = "aspeed,ast2600-sdram-edac" },
 	{},
 };
-
+MODULE_DEVICE_TABLE(of, aspeed_of_match);
 
 static struct platform_driver aspeed_driver = {
 	.driver		= {
@@ -395,18 +459,15 @@ static int __init aspeed_init(void)
 	return platform_driver_register(&aspeed_driver);
 }
 
-
 static void __exit aspeed_exit(void)
 {
 	platform_driver_unregister(&aspeed_driver);
 }
 
-
 module_init(aspeed_init);
 module_exit(aspeed_exit);
 
-
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Stefan Schaeckeler <sschaeck@cisco.com>");
-MODULE_DESCRIPTION("Aspeed AST2500 EDAC driver");
+MODULE_DESCRIPTION("Aspeed EDAC driver");
 MODULE_VERSION("1.0");
-- 
2.17.1

Re: [PATCH v2 1/3] dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support

[Joel Stanley]

On Wed, 2 Dec 2020 at 06:37, Troy Lee <troy_lee@aspeedtech.com> wrote:
>
> Adding Aspeed AST2400 and AST2600 binding for edac driver.
>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>

Acked-by: Joel Stanley <joel@jms.id.au>

> ---
>  .../devicetree/bindings/edac/aspeed-sdram-edac.txt       | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
> index 6a0f3d90d682..8ca9e0a049d8 100644
> --- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
> +++ b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
> @@ -1,6 +1,6 @@
> -Aspeed AST2500 SoC EDAC node
> +Aspeed BMC SoC EDAC node
>
> -The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error
> +The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
>  correction check).
>
>  The memory controller supports SECDED (single bit error correction, double bit
> @@ -11,7 +11,10 @@ Note, the bootloader must configure ECC mode in the memory controller.
>
>
>  Required properties:
> -- compatible: should be "aspeed,ast2500-sdram-edac"
> +- compatible: should be one of
> +       - "aspeed,ast2400-sdram-edac"
> +       - "aspeed,ast2500-sdram-edac"
> +       - "aspeed,ast2600-sdram-edac"
>  - reg:        sdram controller register set should be <0x1e6e0000 0x174>
>  - interrupts: should be AVIC interrupt #0
>
> --
> 2.17.1
>

Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Joel Stanley]

On Wed, 2 Dec 2020 at 06:37, Troy Lee <troy_lee@aspeedtech.com> wrote:
>
> Adding AST2400 and AST2600 edac driver support.
>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
> ---
> Change since v1:
> 1. Removing SoC specific code
> 2. Changing numerical representation of memory sizing
> ---
>  drivers/edac/Kconfig       |   6 +--
>  drivers/edac/aspeed_edac.c | 103 +++++++++++++++++++++++++++++--------
>  2 files changed, 85 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
> index fc30f2ef9782..8ea70746d0bf 100644
> --- a/drivers/edac/Kconfig
> +++ b/drivers/edac/Kconfig
> @@ -508,10 +508,10 @@ config EDAC_QCOM
>           health, you should probably say 'Y' here.
>
>  config EDAC_ASPEED
> -       tristate "Aspeed AST 2500 SoC"
> -       depends on MACH_ASPEED_G5
> +       tristate "Aspeed AST BMC SoC"
> +       depends on (MACH_ASPEED_G4 || MACH_ASPEED_G5 || MACH_ASPEED_G6)

Change this to ARCH_ASPEED.

>         help
> -         Support for error detection and correction on the Aspeed AST 2500 SoC.
> +         Support for error detection and correction on the Aspeed AST BMC SoC.
>
>           First, ECC must be configured in the bootloader. Then, this driver
>           will expose error counters via the EDAC kernel framework.
> diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c
> index fbec28dc661d..b8c8d6a05f91 100644
> --- a/drivers/edac/aspeed_edac.c
> +++ b/drivers/edac/aspeed_edac.c
> @@ -14,12 +14,11 @@
>  #include <linux/regmap.h>
>  #include "edac_module.h"
>
> -

These whitespace cleanups are ok, but can probably go in a different
patch so they aren't mixed up with the functional changes.

>  #define DRV_NAME "aspeed-edac"
>
> -
>  #define ASPEED_MCR_PROT        0x00 /* protection key register */
>  #define ASPEED_MCR_CONF        0x04 /* configuration register */
> +#define ASPEED_MCR_REQ         0x08 /* Graphics Memory Protection register */
>  #define ASPEED_MCR_INTR_CTRL   0x50 /* interrupt control/status register */
>  #define ASPEED_MCR_ADDR_UNREC  0x58 /* address of first un-recoverable error */
>  #define ASPEED_MCR_ADDR_REC    0x5c /* address of last recoverable error */
> @@ -29,15 +28,17 @@
>  #define ASPEED_MCR_PROT_PASSWD             0xfc600309
>  #define ASPEED_MCR_CONF_DRAM_TYPE               BIT(4)
>  #define ASPEED_MCR_CONF_ECC                     BIT(7)
> +#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE (BIT(28)|BIT(29)|BIT(30)|BIT(31))

We can use GENMASK here:

 GENMASK(31, 28)

>  #define ASPEED_MCR_INTR_CTRL_CLEAR             BIT(31)
>  #define ASPEED_MCR_INTR_CTRL_CNT_REC   GENMASK(23, 16)
>  #define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12)
>  #define ASPEED_MCR_INTR_CTRL_ENABLE  (BIT(0) | BIT(1))
>
> +#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500  0x01
> +#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600  0x03
>
>  static struct regmap *aspeed_regmap;
>
> -
>  static int regmap_reg_write(void *context, unsigned int reg, unsigned int val)
>  {
>         void __iomem *regs = (void __iomem *)context;
> @@ -53,7 +54,6 @@ static int regmap_reg_write(void *context, unsigned int reg, unsigned int val)
>         return 0;
>  }
>
> -
>  static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
>  {
>         void __iomem *regs = (void __iomem *)context;
> @@ -63,6 +63,79 @@ static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
>         return 0;
>  }
>
> +extern void aspeed_sdmc_disable_mem_protection(u8 req)
> +{
> +       u32 req_val = 0;
> +
> +       regmap_read(aspeed_regmap, ASPEED_MCR_REQ, &req_val);
> +
> +       req_val &= ~BIT(req);
> +
> +       regmap_write(aspeed_regmap, ASPEED_MCR_REQ, req_val);

This is open coding regmap_update_bits:

  regmap_update_bits(aspeed_regmap, ASPEED_MCR_REQ, BIT(req), BIT(req));

> +}
> +EXPORT_SYMBOL(aspeed_sdmc_disable_mem_protection);

I don't think any of these functions need to be exported. The same
comment applies to the functions below this one; you can make them all
static and drop the extern and the EXPORT_SYMBOL.

> +
> +static const u32 ast2400_dram_table[] = {
> +       64 << 20,
> +       128 << 20,
> +       256 << 20,
> +       512 << 20,
> +};
> +
> +static const u32 ast2500_dram_table[] = {
> +       128 << 20,
> +       256 << 20,
> +       512 << 20,
> +       1024 << 20,
> +};
> +
> +static const u32 ast2600_dram_table[] = {
> +       256 << 20,
> +       512 << 20,
> +       1024 << 20,
> +       2048 << 20,
> +};
> +
> +extern u32 aspeed_get_dram_size(void)
> +{
> +       u32 reg04;
> +       u32 size;
> +       u8 type;
> +
> +       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> +
> +       type = (reg04 & ASPEED_MCR_CONF_DRAM_CTRL_TYPE) >> 28;
> +
> +       if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600)
> +               size = ast2600_dram_table[reg04 & 0x3];
> +       else if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500)
> +               size = ast2500_dram_table[reg04 & 0x3];
> +       else
> +               size = ast2400_dram_table[reg04 & 0x3];
> +
> +       return size;
> +}
> +EXPORT_SYMBOL(aspeed_get_dram_size);
> +
> +static const u32 aspeed_vga_table[] = {
> +       8 << 20,
> +       16 << 20,
> +       32 << 20,
> +       64 << 20,
> +};
> +
> +extern u32 aspeed_get_vga_size(void)
> +{
> +       u32 reg04;
> +       u32 size;
> +
> +       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> +
> +       size = aspeed_vga_table[((reg04 & 0xC) >> 2)];
> +       return size;

If you do this:

 return aspeed_vga_table[((reg04 & 0xC) >> 2)]

You can drop 'size'.

> +}
> +EXPORT_SYMBOL(aspeed_get_vga_size);
> +
>  static bool regmap_is_volatile(struct device *dev, unsigned int reg)
>  {
>         switch (reg) {
> @@ -227,7 +300,6 @@ static int config_irq(void *ctx, struct platform_device *pdev)
>         return 0;
>  }
>
> -
>  static int init_csrows(struct mem_ctl_info *mci)
>  {
>         struct csrow_info *csrow = mci->csrows[0];
> @@ -239,7 +311,7 @@ static int init_csrows(struct mem_ctl_info *mci)
>         int rc;
>
>         /* retrieve info about physical memory from device tree */
> -       np = of_find_node_by_path("/memory");
> +       np = of_find_node_by_name(NULL, "memory");
>         if (!np) {
>                 dev_err(mci->pdev, "dt: missing /memory node\n");
>                 return -ENODEV;
> @@ -275,14 +347,12 @@ static int init_csrows(struct mem_ctl_info *mci)
>         return 0;
>  }
>
> -
>  static int aspeed_probe(struct platform_device *pdev)
>  {
>         struct device *dev = &pdev->dev;
>         struct edac_mc_layer layers[2];
>         struct mem_ctl_info *mci;
>         void __iomem *regs;
> -       u32 reg04;
>         int rc;
>
>         regs = devm_platform_ioremap_resource(pdev, 0);
> @@ -294,13 +364,6 @@ static int aspeed_probe(struct platform_device *pdev)
>         if (IS_ERR(aspeed_regmap))
>                 return PTR_ERR(aspeed_regmap);
>
> -       /* bail out if ECC mode is not configured */
> -       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> -       if (!(reg04 & ASPEED_MCR_CONF_ECC)) {
> -               dev_err(&pdev->dev, "ECC mode is not configured in u-boot\n");
> -               return -EPERM;
> -       }
> -
>         edac_op_state = EDAC_OPSTATE_INT;
>
>         /* allocate & init EDAC MC data structure */
> @@ -373,12 +436,13 @@ static int aspeed_remove(struct platform_device *pdev)
>         return 0;
>  }
>
> -
>  static const struct of_device_id aspeed_of_match[] = {
> +       { .compatible = "aspeed,ast2400-sdram-edac" },
>         { .compatible = "aspeed,ast2500-sdram-edac" },
> +       { .compatible = "aspeed,ast2600-sdram-edac" },
>         {},
>  };
> -
> +MODULE_DEVICE_TABLE(of, aspeed_of_match);
>
>  static struct platform_driver aspeed_driver = {
>         .driver         = {
> @@ -395,18 +459,15 @@ static int __init aspeed_init(void)
>         return platform_driver_register(&aspeed_driver);
>  }
>
> -
>  static void __exit aspeed_exit(void)
>  {
>         platform_driver_unregister(&aspeed_driver);
>  }
>
> -
>  module_init(aspeed_init);
>  module_exit(aspeed_exit);

Unrelated, you can clean up the above 6 lines with module_platform_driver().

Actually, looking at the kernel tree this was already done in v5.9.
Please send your next version based on the latest kernel, eg
v5.10-rc1.

Cheers,

Joel

>
> -
>  MODULE_LICENSE("GPL");
>  MODULE_AUTHOR("Stefan Schaeckeler <sschaeck@cisco.com>");
> -MODULE_DESCRIPTION("Aspeed AST2500 EDAC driver");
> +MODULE_DESCRIPTION("Aspeed EDAC driver");
>  MODULE_VERSION("1.0");
> --
> 2.17.1
>

Re: [PATCH v2 2/3] ARM: dts: aspeed: Add AST2600 edac into common devicetree

[Joel Stanley]

On Wed, 2 Dec 2020 at 06:37, Troy Lee <troy_lee@aspeedtech.com> wrote:
>
> Adding Aspeed AST2600 edac node into common devicetree.
>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  arch/arm/boot/dts/aspeed-g6.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 97ca743363d7..fb144515f397 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -69,6 +69,12 @@
>                 always-on;
>         };
>
> +       edac: sdram@1e6e0000 {
> +               compatible = "aspeed,ast2600-sdram-edac", "syscon";
> +               reg = <0x1e6e0000 0x174>;
> +               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> +       };
> +
>         ahb {
>                 compatible = "simple-bus";
>                 #address-cells = <1>;
> --
> 2.17.1
>

RE: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Troy Lee]

Hi Joel,

Thanks for the suggestion, I'll fix the review and create an new patch against 
latest Linux branch. Those exported function will be referenced in other driver yet 
to be upstream, so should I move those exported functions out of this patch?

Thanks,
Troy Lee

> -----Original Message-----
> From: Joel Stanley <joel@jms.id.au>
> Sent: Wednesday, December 2, 2020 3:02 PM
> To: Troy Lee <troy_lee@aspeedtech.com>
> Cc: Stefan Schaeckeler <sschaeck@cisco.com>; Rob Herring
> <robh+dt@kernel.org>; Andrew Jeffery <andrew@aj.id.au>; Borislav Petkov
> <bp@alien8.de>; Mauro Carvalho Chehab <mchehab@kernel.org>; Tony Luck
> <tony.luck@intel.com>; James Morse <james.morse@arm.com>; Robert
> Richter <rrichter@marvell.com>; open list:OPEN FIRMWARE AND FLATTENED
> DEVICE TREE BINDINGS <devicetree@vger.kernel.org>; moderated
> list:ARM/ASPEED MACHINE SUPPORT <linux-arm-kernel@lists.infradead.org>;
> moderated list:ARM/ASPEED MACHINE SUPPORT
> <linux-aspeed@lists.ozlabs.org>; open list <linux-kernel@vger.kernel.org>;
> open list:EDAC-CORE <linux-edac@vger.kernel.org>; leetroy@gmail.com; Ryan
> Chen <ryan_chen@aspeedtech.com>
> Subject: Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac
> driver
> 
> On Wed, 2 Dec 2020 at 06:37, Troy Lee <troy_lee@aspeedtech.com> wrote:
> >
> > Adding AST2400 and AST2600 edac driver support.
> >
> > Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
> > ---
> > Change since v1:
> > 1. Removing SoC specific code
> > 2. Changing numerical representation of memory sizing
> > ---
> >  drivers/edac/Kconfig       |   6 +--
> >  drivers/edac/aspeed_edac.c | 103
> > +++++++++++++++++++++++++++++--------
> >  2 files changed, 85 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index
> > fc30f2ef9782..8ea70746d0bf 100644
> > --- a/drivers/edac/Kconfig
> > +++ b/drivers/edac/Kconfig
> > @@ -508,10 +508,10 @@ config EDAC_QCOM
> >           health, you should probably say 'Y' here.
> >
> >  config EDAC_ASPEED
> > -       tristate "Aspeed AST 2500 SoC"
> > -       depends on MACH_ASPEED_G5
> > +       tristate "Aspeed AST BMC SoC"
> > +       depends on (MACH_ASPEED_G4 || MACH_ASPEED_G5 ||
> > + MACH_ASPEED_G6)
> 
> Change this to ARCH_ASPEED.
> 
Fixed.

> >         help
> > -         Support for error detection and correction on the Aspeed AST
> 2500 SoC.
> > +         Support for error detection and correction on the Aspeed AST
> BMC SoC.
> >
> >           First, ECC must be configured in the bootloader. Then, this
> driver
> >           will expose error counters via the EDAC kernel framework.
> > diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c
> > index fbec28dc661d..b8c8d6a05f91 100644
> > --- a/drivers/edac/aspeed_edac.c
> > +++ b/drivers/edac/aspeed_edac.c
> > @@ -14,12 +14,11 @@
> >  #include <linux/regmap.h>
> >  #include "edac_module.h"
> >
> > -
> 
> These whitespace cleanups are ok, but can probably go in a different patch so
> they aren't mixed up with the functional changes.
> 
Okay, that make sense.

> >  #define DRV_NAME "aspeed-edac"
> >
> > -
> >  #define ASPEED_MCR_PROT        0x00 /* protection key register */
> >  #define ASPEED_MCR_CONF        0x04 /* configuration register */
> > +#define ASPEED_MCR_REQ         0x08 /* Graphics Memory Protection
> register */
> >  #define ASPEED_MCR_INTR_CTRL   0x50 /* interrupt control/status
> register */
> >  #define ASPEED_MCR_ADDR_UNREC  0x58 /* address of first
> un-recoverable error */
> >  #define ASPEED_MCR_ADDR_REC    0x5c /* address of last recoverable
> error */
> > @@ -29,15 +28,17 @@
> >  #define ASPEED_MCR_PROT_PASSWD             0xfc600309
> >  #define ASPEED_MCR_CONF_DRAM_TYPE               BIT(4)
> >  #define ASPEED_MCR_CONF_ECC                     BIT(7)
> > +#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE
> > +(BIT(28)|BIT(29)|BIT(30)|BIT(31))
> 
> We can use GENMASK here:
> 
>  GENMASK(31, 28)
> 
> >  #define ASPEED_MCR_INTR_CTRL_CLEAR             BIT(31)
> >  #define ASPEED_MCR_INTR_CTRL_CNT_REC   GENMASK(23, 16)
> >  #define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12)
> #define
> > ASPEED_MCR_INTR_CTRL_ENABLE  (BIT(0) | BIT(1))
> >
> > +#define ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500  0x01 #define
> > +ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600  0x03
> >
> >  static struct regmap *aspeed_regmap;
> >
> > -
> >  static int regmap_reg_write(void *context, unsigned int reg, unsigned
> > int val)  {
> >         void __iomem *regs = (void __iomem *)context; @@ -53,7 +54,6
> > @@ static int regmap_reg_write(void *context, unsigned int reg, unsigned
> int val)
> >         return 0;
> >  }
> >
> > -
> >  static int regmap_reg_read(void *context, unsigned int reg, unsigned
> > int *val)  {
> >         void __iomem *regs = (void __iomem *)context; @@ -63,6 +63,79
> > @@ static int regmap_reg_read(void *context, unsigned int reg, unsigned int
> *val)
> >         return 0;
> >  }
> >
> > +extern void aspeed_sdmc_disable_mem_protection(u8 req) {
> > +       u32 req_val = 0;
> > +
> > +       regmap_read(aspeed_regmap, ASPEED_MCR_REQ, &req_val);
> > +
> > +       req_val &= ~BIT(req);
> > +
> > +       regmap_write(aspeed_regmap, ASPEED_MCR_REQ, req_val);
> 
> This is open coding regmap_update_bits:
> 
>   regmap_update_bits(aspeed_regmap, ASPEED_MCR_REQ, BIT(req),
> BIT(req));
> 
> > +}
> > +EXPORT_SYMBOL(aspeed_sdmc_disable_mem_protection);
> 
> I don't think any of these functions need to be exported. The same comment
> applies to the functions below this one; you can make them all static and drop
> the extern and the EXPORT_SYMBOL.
> 
> > +
> > +static const u32 ast2400_dram_table[] = {
> > +       64 << 20,
> > +       128 << 20,
> > +       256 << 20,
> > +       512 << 20,
> > +};
> > +
> > +static const u32 ast2500_dram_table[] = {
> > +       128 << 20,
> > +       256 << 20,
> > +       512 << 20,
> > +       1024 << 20,
> > +};
> > +
> > +static const u32 ast2600_dram_table[] = {
> > +       256 << 20,
> > +       512 << 20,
> > +       1024 << 20,
> > +       2048 << 20,
> > +};
> > +
> > +extern u32 aspeed_get_dram_size(void) {
> > +       u32 reg04;
> > +       u32 size;
> > +       u8 type;
> > +
> > +       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> > +
> > +       type = (reg04 & ASPEED_MCR_CONF_DRAM_CTRL_TYPE) >> 28;
> > +
> > +       if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2600)
> > +               size = ast2600_dram_table[reg04 & 0x3];
> > +       else if (type == ASPEED_MCR_CONF_DRAM_CTRL_TYPE_AST2500)
> > +               size = ast2500_dram_table[reg04 & 0x3];
> > +       else
> > +               size = ast2400_dram_table[reg04 & 0x3];
> > +
> > +       return size;
> > +}
> > +EXPORT_SYMBOL(aspeed_get_dram_size);
> > +
> > +static const u32 aspeed_vga_table[] = {
> > +       8 << 20,
> > +       16 << 20,
> > +       32 << 20,
> > +       64 << 20,
> > +};
> > +
> > +extern u32 aspeed_get_vga_size(void)
> > +{
> > +       u32 reg04;
> > +       u32 size;
> > +
> > +       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> > +
> > +       size = aspeed_vga_table[((reg04 & 0xC) >> 2)];
> > +       return size;
> 
> If you do this:
> 
>  return aspeed_vga_table[((reg04 & 0xC) >> 2)]
> 
> You can drop 'size'.
> 
> > +}
> > +EXPORT_SYMBOL(aspeed_get_vga_size);
> > +
> >  static bool regmap_is_volatile(struct device *dev, unsigned int reg)
> > {
> >         switch (reg) {
> > @@ -227,7 +300,6 @@ static int config_irq(void *ctx, struct platform_device
> *pdev)
> >         return 0;
> >  }
> >
> > -
> >  static int init_csrows(struct mem_ctl_info *mci)  {
> >         struct csrow_info *csrow = mci->csrows[0]; @@ -239,7 +311,7
> @@
> > static int init_csrows(struct mem_ctl_info *mci)
> >         int rc;
> >
> >         /* retrieve info about physical memory from device tree */
> > -       np = of_find_node_by_path("/memory");
> > +       np = of_find_node_by_name(NULL, "memory");
> >         if (!np) {
> >                 dev_err(mci->pdev, "dt: missing /memory node\n");
> >                 return -ENODEV;
> > @@ -275,14 +347,12 @@ static int init_csrows(struct mem_ctl_info *mci)
> >         return 0;
> >  }
> >
> > -
> >  static int aspeed_probe(struct platform_device *pdev)  {
> >         struct device *dev = &pdev->dev;
> >         struct edac_mc_layer layers[2];
> >         struct mem_ctl_info *mci;
> >         void __iomem *regs;
> > -       u32 reg04;
> >         int rc;
> >
> >         regs = devm_platform_ioremap_resource(pdev, 0); @@ -294,13
> > +364,6 @@ static int aspeed_probe(struct platform_device *pdev)
> >         if (IS_ERR(aspeed_regmap))
> >                 return PTR_ERR(aspeed_regmap);
> >
> > -       /* bail out if ECC mode is not configured */
> > -       regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> > -       if (!(reg04 & ASPEED_MCR_CONF_ECC)) {
> > -               dev_err(&pdev->dev, "ECC mode is not configured in
> u-boot\n");
> > -               return -EPERM;
> > -       }
> > -
> >         edac_op_state = EDAC_OPSTATE_INT;
> >
> >         /* allocate & init EDAC MC data structure */ @@ -373,12
> > +436,13 @@ static int aspeed_remove(struct platform_device *pdev)
> >         return 0;
> >  }
> >
> > -
> >  static const struct of_device_id aspeed_of_match[] = {
> > +       { .compatible = "aspeed,ast2400-sdram-edac" },
> >         { .compatible = "aspeed,ast2500-sdram-edac" },
> > +       { .compatible = "aspeed,ast2600-sdram-edac" },
> >         {},
> >  };
> > -
> > +MODULE_DEVICE_TABLE(of, aspeed_of_match);
> >
> >  static struct platform_driver aspeed_driver = {
> >         .driver         = {
> > @@ -395,18 +459,15 @@ static int __init aspeed_init(void)
> >         return platform_driver_register(&aspeed_driver);
> >  }
> >
> > -
> >  static void __exit aspeed_exit(void)
> >  {
> >         platform_driver_unregister(&aspeed_driver);
> >  }
> >
> > -
> >  module_init(aspeed_init);
> >  module_exit(aspeed_exit);
> 
> Unrelated, you can clean up the above 6 lines with module_platform_driver().
> 
> Actually, looking at the kernel tree this was already done in v5.9.
> Please send your next version based on the latest kernel, eg v5.10-rc1.
> 
> Cheers,
> 
> Joel
> 
Good suggestion.

> >
> > -
> >  MODULE_LICENSE("GPL");
> >  MODULE_AUTHOR("Stefan Schaeckeler <sschaeck@cisco.com>");
> > -MODULE_DESCRIPTION("Aspeed AST2500 EDAC driver");
> > +MODULE_DESCRIPTION("Aspeed EDAC driver");
> >  MODULE_VERSION("1.0");
> > --
> > 2.17.1
> >

Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Andrew Jeffery]

On Wed, 2 Dec 2020, at 19:11, Troy Lee wrote:
> Hi Joel,
> 
> Thanks for the suggestion, I'll fix the review and create an new patch 
> against 
> latest Linux branch. Those exported function will be referenced in 
> other driver yet 
> to be upstream, so should I move those exported functions out of this 
> patch?
> 

Yes, let's leave the exports out of this patch, and add them in when you send 
the patch that depends on them.

Andrew

Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Borislav Petkov]

On Thu, Dec 03, 2020 at 01:32:44AM +1030, Andrew Jeffery wrote:
> On Wed, 2 Dec 2020, at 19:11, Troy Lee wrote:
> > Hi Joel,
> > 
> > Thanks for the suggestion, I'll fix the review and create an new patch 
> > against 
> > latest Linux branch. Those exported function will be referenced in 
> > other driver yet 
> > to be upstream, so should I move those exported functions out of this 
> > patch?
> > 
> 
> Yes, let's leave the exports out of this patch, and add them in when you send 
> the patch that depends on them.

And when you do, almost all new exports are EXPORT_SYMBOL_GPL - not
EXPORT_SYMBOL.

Also, I'd like to see how those exports are going to be used. An EDAC
driver function exported to another driver sounds strange. We have only
one other case like this in the EDAC tree:

drivers/edac/amd64_edac.c:554:EXPORT_SYMBOL_GPL(amd64_get_dram_hole_info);

and even that is not really needed...

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

RE: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Troy Lee]

Hi Broislav and Andrew,

I removed these exported function and submitted v3 PATCH.

Thanks,
Troy Lee

> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Thursday, December 3, 2020 2:24 AM
> To: Andrew Jeffery <andrew@aj.id.au>
> Cc: Troy Lee <troy_lee@aspeedtech.com>; Joel Stanley <joel@jms.id.au>; open
> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree@vger.kernel.org>; Tony Luck <tony.luck@intel.com>; Ryan Chen
> <ryan_chen@aspeedtech.com>; James Morse <james.morse@arm.com>;
> moderated list:ARM/ASPEED MACHINE SUPPORT
> <linux-aspeed@lists.ozlabs.org>; open list <linux-kernel@vger.kernel.org>;
> Robert Richter <rrichter@marvell.com>; leetroy@gmail.com; Rob Herring
> <robh+dt@kernel.org>; Stefan M Schaeckeler <sschaeck@cisco.com>; Mauro
> Carvalho Chehab <mchehab@kernel.org>; moderated list:ARM/ASPEED
> MACHINE SUPPORT <linux-arm-kernel@lists.infradead.org>; open
> list:EDAC-CORE <linux-edac@vger.kernel.org>
> Subject: Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac
> driver
> 
> On Thu, Dec 03, 2020 at 01:32:44AM +1030, Andrew Jeffery wrote:
> > On Wed, 2 Dec 2020, at 19:11, Troy Lee wrote:
> > > Hi Joel,
> > >
> > > Thanks for the suggestion, I'll fix the review and create an new
> > > patch against latest Linux branch. Those exported function will be
> > > referenced in other driver yet to be upstream, so should I move
> > > those exported functions out of this patch?
> > >
> >
> > Yes, let's leave the exports out of this patch, and add them in when
> > you send the patch that depends on them.
> 
> And when you do, almost all new exports are EXPORT_SYMBOL_GPL - not
> EXPORT_SYMBOL.
> 
> Also, I'd like to see how those exports are going to be used. An EDAC driver
> function exported to another driver sounds strange. We have only one other
> case like this in the EDAC tree:
> 
> drivers/edac/amd64_edac.c:554:EXPORT_SYMBOL_GPL(amd64_get_dram_hol
> e_info);
> 
> and even that is not really needed...
> 
> Thx.
> 
> --
> Regards/Gruss,
>     Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH v2 3/3] edac: Supporting AST2400 and AST2600 edac driver

[Borislav Petkov]

On Thu, Dec 03, 2020 at 01:27:27AM +0000, Troy Lee wrote:
> Hi Broislav and Andrew,
> 
> I removed these exported function and submitted v3 PATCH.

I saw that. A couple of comments:

First of all, please do not top-post on a public mailing list.

Secondly, Joel gave you Reviewed-by: and Acked-by: for your patches 1
and 2 which are not in your new submission. But they should be, please
have a look at Documentation/process/ while you're waiting for his
review of your v3.

You don't have to resend now with those added and I can add them if Joel
is fine with patch 3 but pls remember to pick up tags reviewers have
given you, in the future.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette