From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Mikko Perttunen <cyndis@kapsi.fi>,
Viresh Kumar <vireshk@kernel.org>,
Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org
Subject: [PATCH v11 02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization
Date: Thu, 3 Dec 2020 22:24:31 +0300 [thread overview]
Message-ID: <20201203192439.16177-3-digetx@gmail.com> (raw)
In-Reply-To: <20201203192439.16177-1-digetx@gmail.com>
Support hardware versioning, which is now required for Tegra20 EMC OPP.
Clean up OPP table initialization by using a error code returned by OPP
API for judging about the OPP table presence in a device-tree and remove
OPP regulator initialization because we're now going to use power domain
instead of a raw regulator. This puts Tegra20 EMC OPP preparation on par
with the Tegra30/124 EMC drivers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/memory/tegra/tegra20-emc.c | 48 +++++++++++++-----------------
1 file changed, 20 insertions(+), 28 deletions(-)
diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c
index 0320d9df4a20..686aaf477d8a 100644
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -910,43 +910,36 @@ static int tegra_emc_interconnect_init(struct tegra_emc *emc)
static int tegra_emc_opp_table_init(struct tegra_emc *emc)
{
- struct opp_table *reg_opp_table = NULL, *clk_opp_table;
- const char *rname = "core";
+ u32 hw_version = BIT(tegra_sku_info.soc_process_id);
+ struct opp_table *clk_opp_table, *hw_opp_table;
int err;
- /*
- * Legacy device-trees don't have OPP table and EMC driver isn't
- * useful in this case.
- */
- if (!device_property_present(emc->dev, "operating-points-v2")) {
- dev_err(emc->dev,
- "OPP table not found, please update your device tree\n");
- return -ENODEV;
- }
-
- /* voltage scaling is optional */
- if (device_property_present(emc->dev, "core-supply")) {
- reg_opp_table = dev_pm_opp_set_regulators(emc->dev, &rname, 1);
- if (IS_ERR(reg_opp_table))
- return dev_err_probe(emc->dev, PTR_ERR(reg_opp_table),
- "failed to set OPP regulator\n");
- }
-
clk_opp_table = dev_pm_opp_set_clkname(emc->dev, NULL);
err = PTR_ERR_OR_ZERO(clk_opp_table);
if (err) {
dev_err(emc->dev, "failed to set OPP clk: %d\n", err);
- goto put_reg_table;
+ return err;
}
- err = dev_pm_opp_of_add_table(emc->dev);
+ hw_opp_table = dev_pm_opp_set_supported_hw(emc->dev, &hw_version, 1);
+ err = PTR_ERR_OR_ZERO(hw_opp_table);
if (err) {
- dev_err(emc->dev, "failed to add OPP table: %d\n", err);
+ dev_err(emc->dev, "failed to set OPP supported HW: %d\n", err);
goto put_clk_table;
}
- dev_info(emc->dev, "current clock rate %lu MHz\n",
- clk_get_rate(emc->clk) / 1000000);
+ err = dev_pm_opp_of_add_table(emc->dev);
+ if (err) {
+ if (err == -ENODEV)
+ dev_err(emc->dev, "OPP table not found, please update your device tree\n");
+ else
+ dev_err(emc->dev, "failed to add OPP table: %d\n", err);
+
+ goto put_hw_table;
+ }
+
+ dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n",
+ hw_version, clk_get_rate(emc->clk) / 1000000);
/* first dummy rate-set initializes voltage state */
err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk));
@@ -959,11 +952,10 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc)
remove_table:
dev_pm_opp_of_remove_table(emc->dev);
+put_hw_table:
+ dev_pm_opp_put_supported_hw(hw_opp_table);
put_clk_table:
dev_pm_opp_put_clkname(clk_opp_table);
-put_reg_table:
- if (reg_opp_table)
- dev_pm_opp_put_regulators(reg_opp_table);
return err;
}
--
2.29.2
next prev parent reply other threads:[~2020-12-03 19:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 19:24 [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property Dmitry Osipenko
2020-12-04 15:46 ` Thierry Reding
2020-12-09 20:17 ` Rob Herring
2020-12-03 19:24 ` Dmitry Osipenko [this message]
2020-12-04 16:20 ` [PATCH v11 02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization Thierry Reding
2020-12-03 19:24 ` [PATCH v11 03/10] memory: tegra30: Support interconnect framework Dmitry Osipenko
2020-12-04 16:27 ` Thierry Reding
2020-12-03 19:24 ` [PATCH v11 04/10] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-12-04 16:41 ` Thierry Reding
2020-12-05 19:52 ` Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 05/10] memory: tegra124-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 06/10] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 07/10] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 08/10] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 09/10] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko
2020-12-07 1:32 ` Chanwoo Choi
2020-12-07 22:11 ` Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 10/10] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko
2020-12-07 1:33 ` Chanwoo Choi
2020-12-05 14:09 ` [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs Krzysztof Kozlowski
2020-12-07 22:11 ` Dmitry Osipenko
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