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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id w12sm1919802ljo.67.2020.12.04.09.18.00 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Dec 2020 09:18:00 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, huziji@marvell.com, adrian.hunter@intel.com, jaz@semihalf.com, tn@semihalf.com, ard.biesheuvel@arm.com, kostap@marvell.com, Marcin Wojtas Subject: [PATCH v4 3/4] mmc: sdhci-xenon: use clk only with DT Date: Fri, 4 Dec 2020 18:16:25 +0100 Message-Id: <20201204171626.10935-4-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20201204171626.10935-1-mw@semihalf.com> References: <20201204171626.10935-1-mw@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a preparation for supporting ACPI, modify the driver to use the clk framework only when booting with DT - otherwise rely on the configuration done by firmware. For that purpose introduce also a custom SDHCI get_max_clock callback. Signed-off-by: Marcin Wojtas --- drivers/mmc/host/sdhci-xenon.c | 51 ++++++++++++-------- 1 file changed, 32 insertions(+), 19 deletions(-) diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index bfc76b0e3eaa..7d9335857715 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -247,6 +247,16 @@ static void xenon_voltage_switch(struct sdhci_host *host) sdhci_readw(host, SDHCI_HOST_CONTROL2); } +static unsigned int xenon_get_max_clock(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + + if (pltfm_host->clk) + return sdhci_pltfm_clk_get_max_clock(host); + else + return pltfm_host->clock; +} + static const struct sdhci_ops sdhci_xenon_ops = { .voltage_switch = xenon_voltage_switch, .set_clock = sdhci_set_clock, @@ -254,7 +264,7 @@ static const struct sdhci_ops sdhci_xenon_ops = { .set_bus_width = sdhci_set_bus_width, .reset = xenon_reset, .set_uhs_signaling = xenon_set_uhs_signaling, - .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .get_max_clock = xenon_get_max_clock, }; static const struct sdhci_pltfm_data sdhci_xenon_pdata = { @@ -483,6 +493,7 @@ static void xenon_sdhc_unprepare(struct sdhci_host *host) static int xenon_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; + struct device *dev = &pdev->dev; struct sdhci_host *host; struct xenon_priv *priv; int err; @@ -503,25 +514,27 @@ static int xenon_probe(struct platform_device *pdev) */ xenon_replace_mmc_host_ops(host); - pltfm_host->clk = devm_clk_get(&pdev->dev, "core"); - if (IS_ERR(pltfm_host->clk)) { - err = PTR_ERR(pltfm_host->clk); - dev_err(&pdev->dev, "Failed to setup input clk: %d\n", err); - goto free_pltfm; - } - err = clk_prepare_enable(pltfm_host->clk); - if (err) - goto free_pltfm; - - priv->axi_clk = devm_clk_get(&pdev->dev, "axi"); - if (IS_ERR(priv->axi_clk)) { - err = PTR_ERR(priv->axi_clk); - if (err == -EPROBE_DEFER) - goto err_clk; - } else { - err = clk_prepare_enable(priv->axi_clk); + if (dev->of_node) { + pltfm_host->clk = devm_clk_get(&pdev->dev, "core"); + if (IS_ERR(pltfm_host->clk)) { + err = PTR_ERR(pltfm_host->clk); + dev_err(&pdev->dev, "Failed to setup input clk: %d\n", err); + goto free_pltfm; + } + err = clk_prepare_enable(pltfm_host->clk); if (err) - goto err_clk; + goto free_pltfm; + + priv->axi_clk = devm_clk_get(&pdev->dev, "axi"); + if (IS_ERR(priv->axi_clk)) { + err = PTR_ERR(priv->axi_clk); + if (err == -EPROBE_DEFER) + goto err_clk; + } else { + err = clk_prepare_enable(priv->axi_clk); + if (err) + goto err_clk; + } } err = mmc_of_parse(host->mmc); -- 2.29.0