[PATCH 1/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Artik 5

[PATCH 1/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Artik 5

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: b004a34bd0ff ("ARM: dts: exynos: Add exynos3250-artik5 dtsi file for ARTIK5 module")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos3250-artik5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
index 04290ec4583a..829c05b2c405 100644
--- a/arch/arm/boot/dts/exynos3250-artik5.dtsi
+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
@@ -79,7 +79,7 @@ &i2c_0 {
 	pmic@66 {
 		compatible = "samsung,s2mps14-pmic";
 		interrupt-parent = <&gpx3>;
-		interrupts = <5 IRQ_TYPE_NONE>;
+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&s2mps14_irq>;
 		reg = <0x66>;
-- 
2.25.1

[PATCH 2/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Monk

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: e0cefb3f79d3 ("ARM: dts: add board dts file for Exynos3250-based Monk board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos3250-monk.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index 69451566945d..fae046e08a5d 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -200,7 +200,7 @@ &i2c_0 {
 	pmic@66 {
 		compatible = "samsung,s2mps14-pmic";
 		interrupt-parent = <&gpx0>;
-		interrupts = <7 IRQ_TYPE_NONE>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
 		reg = <0x66>;
 		wakeup-source;
 
-- 
2.25.1

[PATCH 3/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Rinato

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: faaf348ef468 ("ARM: dts: Add board dts file for exynos3250-rinato")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos3250-rinato.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index a26e3e582a7e..d64ccf4b7d32 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -270,7 +270,7 @@ &i2c_0 {
 	pmic@66 {
 		compatible = "samsung,s2mps14-pmic";
 		interrupt-parent = <&gpx0>;
-		interrupts = <7 IRQ_TYPE_NONE>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
 		reg = <0x66>;
 		wakeup-source;
 
-- 
2.25.1

[PATCH 4/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Spring

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: 53dd4138bb0a ("ARM: dts: Add exynos5250-spring device tree")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos5250-spring.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
index 9d2baea62d0d..fba1462b19df 100644
--- a/arch/arm/boot/dts/exynos5250-spring.dts
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -109,7 +109,7 @@ pmic@66 {
 		compatible = "samsung,s5m8767-pmic";
 		reg = <0x66>;
 		interrupt-parent = <&gpx3>;
-		interrupts = <2 IRQ_TYPE_NONE>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>;
 		wakeup-source;
-- 
2.25.1

[PATCH 5/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: 1fed2252713e ("ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index bf457d0c02eb..1aad4859c5f1 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -349,7 +349,7 @@ pmic@66 {
 		reg = <0x66>;
 
 		interrupt-parent = <&gpx3>;
-		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&s2mps11_irq>;
 
-- 
2.25.1

[PATCH 6/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index d0df560eb0db..6d690b1db099 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -509,7 +509,7 @@ pmic@66 {
 		samsung,s2mps11-acokb-ground;
 
 		interrupt-parent = <&gpx0>;
-		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&s2mps11_irq>;
 
-- 
2.25.1

[PATCH 7/9] arm64: dts: exynos: correct PMIC interrupt trigger level on TM2

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index 03486a8ffc67..4c5106a0860d 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -388,7 +388,7 @@ &hsi2c_0 {
 	pmic@66 {
 		compatible = "samsung,s2mps13-pmic";
 		interrupt-parent = <&gpa0>;
-		interrupts = <7 IRQ_TYPE_NONE>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
 		reg = <0x66>;
 		samsung,s2mps11-wrstbi-ground;
 
-- 
2.25.1

[PATCH 8/9] arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso

[Krzysztof Kozlowski]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Fixes: 9589f7721e16 ("arm64: dts: Add S2MPS15 PMIC node on exynos7-espresso")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index 695d4c140646..125c03f351d9 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -90,7 +90,7 @@ &hsi2c_4 {
 	pmic@66 {
 		compatible = "samsung,s2mps15-pmic";
 		reg = <0x66>;
-		interrupts = <2 IRQ_TYPE_NONE>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 		interrupt-parent = <&gpa0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pmic_irq>;
-- 
2.25.1

[PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Krzysztof Kozlowski]

Interrupt line can be configured on different hardware in different way,
even inverted.  Therefore driver should not enforce specific trigger
type - edge falling - but instead rely on Devicetree to configure it.

The Samsung PMIC drivers are used only on Devicetree boards.

Additionally, the PMIC datasheets describe the interrupt line as active
low with a requirement of acknowledge from the CPU therefore the edge
falling is not correct.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

This patch should wait till DTS changes are merged, as it relies on
proper Devicetree.
---
 drivers/mfd/sec-irq.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index a98c5d165039..760f88a865ab 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -480,8 +480,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
 	}
 
 	ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic,
-				       sec_pmic->irq,
-				       IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+				       sec_pmic->irq, IRQF_ONESHOT,
 				       sec_pmic->irq_base, sec_irq_chip,
 				       &sec_pmic->irq_data);
 	if (ret != 0) {
-- 
2.25.1

Re: [PATCH 1/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Artik 5

[Marek Szyprowski]

On 10.12.2020 22:28, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  Without specifying the
> interrupt type in Devicetree, kernel might apply some fixed
> configuration, not necessarily working for this hardware.
>
> Fixes: b004a34bd0ff ("ARM: dts: exynos: Add exynos3250-artik5 dtsi file for ARTIK5 module")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>   arch/arm/boot/dts/exynos3250-artik5.dtsi | 2 +-
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
> index 04290ec4583a..829c05b2c405 100644
> --- a/arch/arm/boot/dts/exynos3250-artik5.dtsi
> +++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
> @@ -79,7 +79,7 @@ &i2c_0 {
>   	pmic@66 {
>   		compatible = "samsung,s2mps14-pmic";
>   		interrupt-parent = <&gpx3>;
> -		interrupts = <5 IRQ_TYPE_NONE>;
> +		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
>   		pinctrl-names = "default";
>   		pinctrl-0 = <&s2mps14_irq>;
>   		reg = <0x66>;

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 3/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Rinato

[Marek Szyprowski]

On 10.12.2020 22:28, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  Without specifying the
> interrupt type in Devicetree, kernel might apply some fixed
> configuration, not necessarily working for this hardware.
>
> Fixes: faaf348ef468 ("ARM: dts: Add board dts file for exynos3250-rinato")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>   arch/arm/boot/dts/exynos3250-rinato.dts | 2 +-
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
> index a26e3e582a7e..d64ccf4b7d32 100644
> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
> @@ -270,7 +270,7 @@ &i2c_0 {
>   	pmic@66 {
>   		compatible = "samsung,s2mps14-pmic";
>   		interrupt-parent = <&gpx0>;
> -		interrupts = <7 IRQ_TYPE_NONE>;
> +		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
>   		reg = <0x66>;
>   		wakeup-source;
>   

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 6/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family

[Marek Szyprowski]

On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  The falling edge
> interrupt will mostly work but it's not correct.
>
> Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>   arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +-
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> index d0df560eb0db..6d690b1db099 100644
> --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> @@ -509,7 +509,7 @@ pmic@66 {
>   		samsung,s2mps11-acokb-ground;
>   
>   		interrupt-parent = <&gpx0>;
> -		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
> +		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
>   		pinctrl-names = "default";
>   		pinctrl-0 = <&s2mps11_irq>;
>   

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 5/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa

[Marek Szyprowski]

On 10.12.2020 22:28, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  The falling edge
> interrupt will mostly work but it's not correct.
>
> Fixes: 1fed2252713e ("ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>   arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +-
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> index bf457d0c02eb..1aad4859c5f1 100644
> --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> @@ -349,7 +349,7 @@ pmic@66 {
>   		reg = <0x66>;
>   
>   		interrupt-parent = <&gpx3>;
> -		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
> +		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
>   		pinctrl-names = "default";
>   		pinctrl-0 = <&s2mps11_irq>;
>   

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 7/9] arm64: dts: exynos: correct PMIC interrupt trigger level on TM2

[Marek Szyprowski]

On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  Without specifying the
> interrupt type in Devicetree, kernel might apply some fixed
> configuration, not necessarily working for this hardware.
>
> Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>   arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> index 03486a8ffc67..4c5106a0860d 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
> @@ -388,7 +388,7 @@ &hsi2c_0 {
>   	pmic@66 {
>   		compatible = "samsung,s2mps13-pmic";
>   		interrupt-parent = <&gpa0>;
> -		interrupts = <7 IRQ_TYPE_NONE>;
> +		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
>   		reg = <0x66>;
>   		samsung,s2mps11-wrstbi-ground;
>   

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Marek Szyprowski]

On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> Interrupt line can be configured on different hardware in different way,
> even inverted.  Therefore driver should not enforce specific trigger
> type - edge falling - but instead rely on Devicetree to configure it.
>
> The Samsung PMIC drivers are used only on Devicetree boards.
>
> Additionally, the PMIC datasheets describe the interrupt line as active
> low with a requirement of acknowledge from the CPU therefore the edge
> falling is not correct.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

It looks that this together with DTS change fixes RTC alarm failure that 
I've observed from time to time on TM2e board!

> ---
>
> This patch should wait till DTS changes are merged, as it relies on
> proper Devicetree.
> ---
>   drivers/mfd/sec-irq.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
> index a98c5d165039..760f88a865ab 100644
> --- a/drivers/mfd/sec-irq.c
> +++ b/drivers/mfd/sec-irq.c
> @@ -480,8 +480,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
>   	}
>   
>   	ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic,
> -				       sec_pmic->irq,
> -				       IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
> +				       sec_pmic->irq, IRQF_ONESHOT,
>   				       sec_pmic->irq_base, sec_irq_chip,
>   				       &sec_pmic->irq_data);
>   	if (ret != 0) {

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Krzysztof Kozlowski]

On Fri, Dec 18, 2020 at 02:25:39PM +0100, Marek Szyprowski wrote:
> On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> > Interrupt line can be configured on different hardware in different way,
> > even inverted.  Therefore driver should not enforce specific trigger
> > type - edge falling - but instead rely on Devicetree to configure it.
> >
> > The Samsung PMIC drivers are used only on Devicetree boards.
> >
> > Additionally, the PMIC datasheets describe the interrupt line as active
> > low with a requirement of acknowledge from the CPU therefore the edge
> > falling is not correct.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> 
> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> 
> It looks that this together with DTS change fixes RTC alarm failure that 
> I've observed from time to time on TM2e board!

Great! I'll add this to the commit msg.

Thanks for testing.

Best regards,
Krzysztof


> 
> > ---
> >
> > This patch should wait till DTS changes are merged, as it relies on
> > proper Devicetree.
> > ---

Re: [PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Marek Szyprowski]

Hi Krzysztof,

On 18.12.2020 15:22, Krzysztof Kozlowski wrote:
> On Fri, Dec 18, 2020 at 02:25:39PM +0100, Marek Szyprowski wrote:
>> On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
>>> Interrupt line can be configured on different hardware in different way,
>>> even inverted.  Therefore driver should not enforce specific trigger
>>> type - edge falling - but instead rely on Devicetree to configure it.
>>>
>>> The Samsung PMIC drivers are used only on Devicetree boards.
>>>
>>> Additionally, the PMIC datasheets describe the interrupt line as active
>>> low with a requirement of acknowledge from the CPU therefore the edge
>>> falling is not correct.
>>>
>>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>
>> It looks that this together with DTS change fixes RTC alarm failure that
>> I've observed from time to time on TM2e board!
> Great! I'll add this to the commit msg.
>
> Thanks for testing.

BTW, while playing with this, maybe it would make sense to fix the 
reported interrupt type for the PMIC sub-interrupts:

# grep s2mps /proc/interrupts
120:          0      gpa0   7 Level     s2mps13
121:          0   s2mps13  10 Edge      rtc-alarm0

Best regards

-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Krzysztof Kozlowski]

On Mon, Dec 21, 2020 at 08:36:02AM +0100, Marek Szyprowski wrote:
> Hi Krzysztof,
> 
> On 18.12.2020 15:22, Krzysztof Kozlowski wrote:
> > On Fri, Dec 18, 2020 at 02:25:39PM +0100, Marek Szyprowski wrote:
> >> On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> >>> Interrupt line can be configured on different hardware in different way,
> >>> even inverted.  Therefore driver should not enforce specific trigger
> >>> type - edge falling - but instead rely on Devicetree to configure it.
> >>>
> >>> The Samsung PMIC drivers are used only on Devicetree boards.
> >>>
> >>> Additionally, the PMIC datasheets describe the interrupt line as active
> >>> low with a requirement of acknowledge from the CPU therefore the edge
> >>> falling is not correct.
> >>>
> >>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> >> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> >>
> >> It looks that this together with DTS change fixes RTC alarm failure that
> >> I've observed from time to time on TM2e board!
> > Great! I'll add this to the commit msg.
> >
> > Thanks for testing.
> 
> BTW, while playing with this, maybe it would make sense to fix the 
> reported interrupt type for the PMIC sub-interrupts:
> 
> # grep s2mps /proc/interrupts
> 120:          0      gpa0   7 Level     s2mps13
> 121:          0   s2mps13  10 Edge      rtc-alarm0

I also spotted this. It's a virtual interrupt and I am not sure whether
we can actually configure it when the hardware does not allow to set the
type (the regmap_irq_type requires register offsets).

Best regards,
Krzysztof

Re: [PATCH 9/9] mfd: sec-irq: Do not enforce (incorrect) interrupt trigger type

[Marek Szyprowski]

On 21.12.2020 08:55, Krzysztof Kozlowski wrote:
> On Mon, Dec 21, 2020 at 08:36:02AM +0100, Marek Szyprowski wrote:
>> On 18.12.2020 15:22, Krzysztof Kozlowski wrote:
>>> On Fri, Dec 18, 2020 at 02:25:39PM +0100, Marek Szyprowski wrote:
>>>> On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
>>>>> Interrupt line can be configured on different hardware in different way,
>>>>> even inverted.  Therefore driver should not enforce specific trigger
>>>>> type - edge falling - but instead rely on Devicetree to configure it.
>>>>>
>>>>> The Samsung PMIC drivers are used only on Devicetree boards.
>>>>>
>>>>> Additionally, the PMIC datasheets describe the interrupt line as active
>>>>> low with a requirement of acknowledge from the CPU therefore the edge
>>>>> falling is not correct.
>>>>>
>>>>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>>>> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>>>
>>>> It looks that this together with DTS change fixes RTC alarm failure that
>>>> I've observed from time to time on TM2e board!
>>> Great! I'll add this to the commit msg.
>>>
>>> Thanks for testing.
>> BTW, while playing with this, maybe it would make sense to fix the
>> reported interrupt type for the PMIC sub-interrupts:
>>
>> # grep s2mps /proc/interrupts
>> 120:          0      gpa0   7 Level     s2mps13
>> 121:          0   s2mps13  10 Edge      rtc-alarm0
> I also spotted this. It's a virtual interrupt and I am not sure whether
> we can actually configure it when the hardware does not allow to set the
> type (the regmap_irq_type requires register offsets).

I know that it is virtual, but maybe the regmap code could simply copy 
the interrupt type from its parent interrupt?

Best regards

-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Re: [PATCH 1/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Artik 5

[Krzysztof Kozlowski]

On Thu, 10 Dec 2020 22:28:55 +0100, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  Without specifying the
> interrupt type in Devicetree, kernel might apply some fixed
> configuration, not necessarily working for this hardware.

Applied, thanks!

[1/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Artik 5
      commit: 58139a7837133538099dc59447f33765b61f5c27
[2/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Monk
      commit: c9b260c91ab61d4094a3c152546d88d41259d647
[3/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Rinato
      commit: 2c9f52d2b09abd25bd00ef2a5a35d9246fc92d88
[4/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Spring
      commit: 1d6f6eee94da4f60ddb2107ffcf55629083711df
[5/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa
      commit: 4a96ea5cf0550766397f5e9221c4f2a949492ee6
[6/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family
      commit: 0274326ce6796813842998141174bd5a0e9ff908
[7/9] arm64: dts: exynos: correct PMIC interrupt trigger level on TM2
      commit: 9fd8f10d119c6c48899ace33ff0f7e8702ad1d66
[8/9] arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso
      commit: acdd83e384c41d20d66bc0045f5eb67b6d67ed69

Best regards,
-- 
Krzysztof Kozlowski <krzk@kernel.org>