From: Andrew Lunn <andrew@lunn.ch>
To: Steen Hegelund <steen.hegelund@microchip.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Lars Povlsen <lars.povlsen@microchip.com>,
Bjarni Jonasson <bjarni.jonasson@microchip.com>,
Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 2/4] phy: Add ethernet serdes configuration option
Date: Sat, 12 Dec 2020 20:30:55 +0100 [thread overview]
Message-ID: <20201212193055.GC2779451@lunn.ch> (raw)
In-Reply-To: <20201211090541.157926-3-steen.hegelund@microchip.com>
On Fri, Dec 11, 2020 at 10:05:39AM +0100, Steen Hegelund wrote:
> Provide a new ethernet phy configuration structure, that
> allow PHYs used for ethernet to be configured with
> speed, media type and clock information.
>
> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2020-12-12 19:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 9:05 [PATCH v10 0/4] Adding the Sparx5 Serdes driver Steen Hegelund
2020-12-11 9:05 ` [PATCH v10 1/4] dt-bindings: phy: Add sparx5-serdes bindings Steen Hegelund
2020-12-12 19:29 ` Andrew Lunn
2020-12-11 9:05 ` [PATCH v10 2/4] phy: Add ethernet serdes configuration option Steen Hegelund
2020-12-12 19:30 ` Andrew Lunn [this message]
2020-12-11 9:05 ` [PATCH v10 3/4] phy: Add Sparx5 ethernet serdes PHY driver Steen Hegelund
2020-12-12 19:35 ` Andrew Lunn
2020-12-11 9:05 ` [PATCH v10 4/4] arm64: dts: sparx5: Add Sparx5 serdes driver node Steen Hegelund
2020-12-12 19:36 ` Andrew Lunn
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