Re: [PATCH v4 1/2] dt-bindings: hwlock: add sun8i_hwspinlock

[Maxime Ripard <maxime@cerno.tech>]

[-- Attachment #1: Type: text/plain, Size: 3234 bytes --]

On Fri, Dec 11, 2020 at 10:13:11AM +0100, Wilken Gottwalt wrote:
> On Fri, 11 Dec 2020 09:57:57 +0100
> Maxime Ripard <maxime@cerno.tech> wrote:
> 
> > Hi,
> > 
> > On Fri, Dec 11, 2020 at 09:23:48AM +0100, Wilken Gottwalt wrote:
> > > Adds documentation on how to use the sun8i_hwspinlock driver for sun8i
> > > compatible SoCs.
> > > 
> > > Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > > ---
> > > Changes in v4:
> > >   - changed binding to sun8i-a33-hwpinlock
> > >   - added changes suggested by Maxime Ripard
> > > 
> > > Changes in v3:
> > >   - changed symbols from sunxi to sun8i
> > > 
> > > Changes in v2:
> > >   - fixed memory ranges
> > > ---
> > >  .../bindings/hwlock/sun8i-hwspinlock.yaml     | 56 +++++++++++++++++++
> > >  1 file changed, 56 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml
> > > 
> > > diff --git a/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml
> > > b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml new file mode 100644
> > > index 000000000000..76963d8abd5f
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml
> > 
> > We usually have the schemas with the same name than the compatible 
> > 
> > > @@ -0,0 +1,56 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/hwlock/sun8i-hwspinlock.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: SUN8I hardware spinlock driver for Allwinner sun8i compatible SoCs
> > > +
> > > +maintainers:
> > > +  - Wilken Gottwalt <wilken.gottwalt@posteo.net>
> > > +
> > > +description:
> > > +  The hardware unit provides sempahores between the ARM cores and the embedded
> > 
> >                                 ^ typo
> 
> Hmm, you are right. This is odd, the patch checking script didn't catch that one.
> 
> > > +  OpenRisc core on the SoC.
> > 
> > It's not just OpenRisc: there's some SoC that will have an xtensa core. Maybe we can replace
> > openrisc by secondary?
>  
> So there are actually different embedded cores? What about embedded
> companion core?

Companion core works for me

> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: allwinner,sun8i-a33-hwspinlock
> > > +
> > > +    reg:
> > > +      maxItems: 1
> > > +
> > > +    clocks:
> > > +      maxItems: 1
> > > +
> > > +    clock-names:
> > > +      items:
> > > +        - const: ahb
> > 
> > clock-names is useless when you have a single clock
> > 
> > > +
> > > +    resets:
> > > +      maxItems: 1
> > > +
> > > +    reset-names:
> > > +      items:
> > > +        - const: ahb
> > 
> > and reset-names is useless as well when there's a single reset line
> 
> So just drop the reset-names lines? I'm still a bit unsure about this dt
> yaml documentation format. I try to learn from the existing bindings, but
> the quality seems a bit mixed. So thank you for your patience.

Yeah, drop the reset-names and clock-names properties from the
properties section, required enum and your example

Maxime

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]